#***************************************************************************

#sjplacer

#Version:            1.1

#Build Date:         Sep  9 2019 11:47:43

#File Generated:     Jul 27 2021 22:59:30

#Purpose:            

#Copyright (C) 2010-2011 by Softjin Technologies Pvt Ltd. All rights reserved.

#***************************************************************************

Executing : C:\Program Files (x86)\Cypress\PSoC Creator\4.3\PSoC Creator\bin/sjplacer.exe --proj-name VCNL4030X01 --netlist-vh2 VCNL4030X01_p.vh2 --arch p35_udb4x6 --arch-file C:\Program Files (x86)\Cypress\PSoC Creator\4.3\PSoC Creator\dev\arch/udbdsi_4x6_24.cydata --ip-file C:\Program Files (x86)\Cypress\PSoC Creator\4.3\PSoC Creator\dev\psoc5/psoc5lp/ip_blocks.cydata --rrg-file C:\Program Files (x86)\Cypress\PSoC Creator\4.3\PSoC Creator\dev\psoc5/psoc5lp/route_arch-rrg.cydata --irq-file C:\Program Files (x86)\Cypress\PSoC Creator\4.3\PSoC Creator\dev\psoc5/psoc5lp/irqconn.cydata --drq-file C:\Program Files (x86)\Cypress\PSoC Creator\4.3\PSoC Creator\dev\psoc5/psoc5lp/dmaconn.cydata --dsi-conn-file C:\Program Files (x86)\Cypress\PSoC Creator\4.3\PSoC Creator\dev\psoc5/psoc5lp/dsiconn.cydata --pins-file pins_68-QFN.xml --lib-file VCNL4030X01_p.lib --sdc-file VCNL4030X01.sdc --io-pcf VCNL4030X01.pci --outdir .

		Softjin Techologies Placer, Version 1.1

Build Date : Sep  9 2019	11:45:12

D2004: Option and Settings Summary
=============================================================
Netlist vh2 file          - VCNL4030X01_p.vh2
Architecture file         - C:\Program Files (x86)\Cypress\PSoC Creator\4.3\PSoC Creator\dev\arch/udbdsi_4x6_24.cydata
Package                   - 
Defparam file             - 
SDC file                  - VCNL4030X01.sdc
Output directory          - .
Timing library            - VCNL4030X01_p.lib
IO Placement file         - VCNL4030X01.pci

D2050: Starting reading inputs for placer
=============================================================
D2065: Reading netlist file : "VCNL4030X01_p.vh2"
D2065: Reading arch file : "C:\Program Files (x86)\Cypress\PSoC Creator\4.3\PSoC Creator\dev\arch/udbdsi_4x6_24.cydata"
D2051: Reading of inputs for placer completed successfully

D2053: Starting placement of the design
=============================================================

Phase 2
Phase 3
I2659: No Constrained paths were found. The placer will run in non-timing driven mode.

Design Statistics after Packing
    Number of Combinational MCs 	:	0
    Number of Sequential MCs    	:	0
    Number of DPs               	:	0
    Number of Controls          	:	0
    Number of Status            	:	0
    Number of SyncCells         	:	0
    Number of count7cells       	:	0

Device Utilization Summary after Packing
    Macrocells                  :	0/192
    UDBS                        :	0/24
    IOs                         :	4/72


D2088: Phase 3, elapsed time : 0.0 (sec)

Phase 4
D2088: Phase 4, elapsed time : 0.0 (sec)

Phase 5
D2088: Phase 5, elapsed time : 0.0 (sec)

Phase 8
D2088: Phase 8, elapsed time : 0.0 (sec)

D2054: Placement of the design completed successfully

I2076: Total run-time: 0.5 sec.

