# VCNL4030X01
# 2021-07-27 20:59:31Z

# IO_0@[IOP=(1)][IoId=(0)] is reserved: SWDDebugEnabled
dont_use_io iocell 1 0
# IO_1@[IOP=(1)][IoId=(1)] is reserved: SWDDebugEnabled
dont_use_io iocell 1 1
# IO_3@[IOP=(1)][IoId=(3)] is reserved: SWDDebugEnabled
dont_use_io iocell 1 3
set_location "ClockBlock" clockblockcell -1 -1 0
set_io "SCL_1(0)" iocell 12 0
set_io "SDA_1(0)" iocell 12 1
set_io "\CDC:Dm(0)\" iocell 15 7
set_location "\CDC:Dp\" logicalport -1 -1 15
set_io "\CDC:Dp(0)\" iocell 15 6
set_location "\I2C_1:I2C_IRQ\" interrupt -1 -1 15
set_location "\I2C_1:I2C_FF\" i2ccell -1 -1 0
set_location "\CDC:dp_int\" interrupt -1 -1 12
set_location "\CDC:USB\" usbcell -1 -1 0
set_location "\CDC:ep_3\" interrupt -1 -1 2
set_location "\CDC:ep_2\" interrupt -1 -1 1
set_location "\CDC:ep_1\" interrupt -1 -1 0
set_location "\CDC:ep_0\" interrupt -1 -1 24
set_location "\CDC:bus_reset\" interrupt -1 -1 23
set_location "\CDC:arb_int\" interrupt -1 -1 22
set_location "\CDC:sof_int\" interrupt -1 -1 21
