net ClockBlock_BUS_CLK
	term   ":clockblockcell.clk_bus_glb"
	switch ":clockblockcell.clk_bus_glb==>:interrupt_15.clock"
	term   ":interrupt_15.clock"
	switch ":clockblockcell.clk_bus_glb==>:interrupt_12.clock"
	term   ":interrupt_12.clock"
	switch ":clockblockcell.clk_bus_glb==>:interrupt_2.clock"
	term   ":interrupt_2.clock"
	switch ":clockblockcell.clk_bus_glb==>:interrupt_1.clock"
	term   ":interrupt_1.clock"
	switch ":clockblockcell.clk_bus_glb==>:interrupt_0.clock"
	term   ":interrupt_0.clock"
	switch ":clockblockcell.clk_bus_glb==>:interrupt_24.clock"
	term   ":interrupt_24.clock"
	switch ":clockblockcell.clk_bus_glb==>:interrupt_23.clock"
	term   ":interrupt_23.clock"
	switch ":clockblockcell.clk_bus_glb==>:interrupt_22.clock"
	term   ":interrupt_22.clock"
	switch ":clockblockcell.clk_bus_glb==>:interrupt_21.clock"
	term   ":interrupt_21.clock"
end ClockBlock_BUS_CLK
net Net_12
	term   ":usbcell.sof_int"
	switch ":usbcell.sof_int==>Stub-:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v4+:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v6"
	switch "Stub-:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v4+:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v6==>:interrupt_idmux_21.in_0"
	switch ":interrupt_idmux_21.interrupt_idmux_21__out==>:interrupt_21.interrupt"
	term   ":interrupt_21.interrupt"
end Net_12
net \CDC:Net_1010\
	term   ":logicalport_15.interrupt"
	switch ":logicalport_15.interrupt==>Stub-:dsiswitch_bottom@[DSI=(1,2)][side=bottom]:dsihc_bottom:v36+:dsiswitch_bottom@[DSI=(1,2)][side=bottom]:dsihc_bottom:v38"
	switch "Stub-:dsiswitch_bottom@[DSI=(1,2)][side=bottom]:dsihc_bottom:v36+:dsiswitch_bottom@[DSI=(1,2)][side=bottom]:dsihc_bottom:v38==>:interrupt_idmux_12.in_0"
	switch ":interrupt_idmux_12.interrupt_idmux_12__out==>:interrupt_12.interrupt"
	term   ":interrupt_12.interrupt"
end \CDC:Net_1010\
net \CDC:Net_1876\
	term   ":usbcell.usb_int"
	switch ":usbcell.usb_int==>Stub-:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v24+:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v26"
	switch "Stub-:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v24+:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v26==>:interrupt_idmux_23.in_0"
	switch ":interrupt_idmux_23.interrupt_idmux_23__out==>:interrupt_23.interrupt"
	term   ":interrupt_23.interrupt"
end \CDC:Net_1876\
net \CDC:Net_1889\
	term   ":usbcell.arb_int"
	switch ":usbcell.arb_int==>Stub-:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v25+:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v27"
	switch "Stub-:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v25+:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v27==>:interrupt_idmux_22.in_0"
	switch ":interrupt_idmux_22.interrupt_idmux_22__out==>:interrupt_22.interrupt"
	term   ":interrupt_22.interrupt"
end \CDC:Net_1889\
net \CDC:ep_int_0\
	term   ":usbcell.ept_int_0"
	switch ":usbcell.ept_int_0==>Stub-:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v5+:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v7"
	switch "Stub-:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v5+:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v7==>:interrupt_idmux_24.in_0"
	switch ":interrupt_idmux_24.interrupt_idmux_24__out==>:interrupt_24.interrupt"
	term   ":interrupt_24.interrupt"
end \CDC:ep_int_0\
net \CDC:ep_int_1\
	term   ":usbcell.ept_int_1"
	switch ":usbcell.ept_int_1==>Stub-:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v10+:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v8"
	switch "OStub-:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v10+:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v8"
	switch ":dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:10,10"
	switch ":hvswitch@[UDB=(0,1)][side=left]:23,10_f"
	switch ":hvswitch@[UDB=(1,1)][side=left]:vseg_23_top_f"
	switch ":hvswitch@[UDB=(2,1)][side=left]:vseg_23_top_f"
	switch ":hvswitch@[UDB=(3,1)][side=left]:vseg_23_top_f"
	switch ":hvswitch@[UDB=(3,1)][side=left]:23,95_b"
	switch ":hvswitch@[UDB=(3,2)][side=left]:hseg_95_f"
	switch ":hvswitch@[UDB=(3,3)][side=left]:hseg_95_f"
	switch ":hvswitch@[UDB=(3,4)][side=left]:hseg_95_f"
	switch ":dsiswitch_bottom@[DSI=(1,5)][side=bottom]:dsihc_bottom:48,95_f"
	switch "IStub-:dsiswitch_bottom@[DSI=(1,5)][side=bottom]:dsihc_bottom:v48+:dsiswitch_bottom@[DSI=(1,5)][side=bottom]:dsihc_bottom:v50"
	switch "Stub-:dsiswitch_bottom@[DSI=(1,5)][side=bottom]:dsihc_bottom:v48+:dsiswitch_bottom@[DSI=(1,5)][side=bottom]:dsihc_bottom:v50==>:interrupt_idmux_0.in_2"
	switch ":interrupt_idmux_0.interrupt_idmux_0__out==>:interrupt_0.interrupt"
	term   ":interrupt_0.interrupt"
end \CDC:ep_int_1\
net \CDC:ep_int_2\
	term   ":usbcell.ept_int_2"
	switch ":usbcell.ept_int_2==>Stub-:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v11+:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v9"
	switch "OStub-:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v11+:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v9"
	switch ":dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:9,90"
	switch ":hvswitch@[UDB=(0,1)][side=left]:21,90_f"
	switch ":hvswitch@[UDB=(1,1)][side=left]:vseg_21_top_f"
	switch ":hvswitch@[UDB=(2,1)][side=left]:vseg_21_top_f"
	switch ":hvswitch@[UDB=(3,1)][side=left]:vseg_21_top_f"
	switch ":hvswitch@[UDB=(3,1)][side=left]:21,68_b"
	switch ":hvswitch@[UDB=(3,2)][side=left]:hseg_68_f"
	switch ":hvswitch@[UDB=(3,3)][side=left]:hseg_68_f"
	switch ":hvswitch@[UDB=(3,4)][side=left]:hseg_68_f"
	switch ":dsiswitch_bottom@[DSI=(1,5)][side=bottom]:dsihc_bottom:49,68_f"
	switch "IStub-:dsiswitch_bottom@[DSI=(1,5)][side=bottom]:dsihc_bottom:v49+:dsiswitch_bottom@[DSI=(1,5)][side=bottom]:dsihc_bottom:v51"
	switch "Stub-:dsiswitch_bottom@[DSI=(1,5)][side=bottom]:dsihc_bottom:v49+:dsiswitch_bottom@[DSI=(1,5)][side=bottom]:dsihc_bottom:v51==>:interrupt_idmux_1.in_2"
	switch ":interrupt_idmux_1.interrupt_idmux_1__out==>:interrupt_1.interrupt"
	term   ":interrupt_1.interrupt"
end \CDC:ep_int_2\
net \CDC:ep_int_3\
	term   ":usbcell.ept_int_3"
	switch ":usbcell.ept_int_3==>Stub-:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v12+:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v14"
	switch "OStub-:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v12+:dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:v14"
	switch ":dsiswitch_top@[DSI=(0,2)][side=top]:dsihc_top:12,78"
	switch ":hvswitch@[UDB=(0,1)][side=left]:17,78_f"
	switch ":hvswitch@[UDB=(1,1)][side=left]:vseg_17_top_f"
	switch ":hvswitch@[UDB=(2,1)][side=left]:vseg_17_top_f"
	switch ":hvswitch@[UDB=(3,1)][side=left]:vseg_17_top_f"
	switch ":hvswitch@[UDB=(3,1)][side=left]:17,73_b"
	switch ":hvswitch@[UDB=(3,2)][side=left]:hseg_73_f"
	switch ":hvswitch@[UDB=(3,3)][side=left]:hseg_73_f"
	switch ":hvswitch@[UDB=(3,4)][side=left]:hseg_73_f"
	switch ":dsiswitch_bottom@[DSI=(1,5)][side=bottom]:dsihc_bottom:54,73_f"
	switch "IStub-:dsiswitch_bottom@[DSI=(1,5)][side=bottom]:dsihc_bottom:v52+:dsiswitch_bottom@[DSI=(1,5)][side=bottom]:dsihc_bottom:v54"
	switch "Stub-:dsiswitch_bottom@[DSI=(1,5)][side=bottom]:dsihc_bottom:v52+:dsiswitch_bottom@[DSI=(1,5)][side=bottom]:dsihc_bottom:v54==>:interrupt_idmux_2.in_2"
	switch ":interrupt_idmux_2.interrupt_idmux_2__out==>:interrupt_2.interrupt"
	term   ":interrupt_2.interrupt"
end \CDC:ep_int_3\
net \I2C_1:Net_1109_0\
	term   ":ioport12:pin0.fb"
	switch ":ioport12:pin0.fb==>Stub-:dsiswitch_bottom@[DSI=(1,0)][side=bottom]:dsihc_bottom:v16+:dsiswitch_bottom@[DSI=(1,0)][side=bottom]:dsihc_bottom:v18"
	switch "OStub-:dsiswitch_bottom@[DSI=(1,0)][side=bottom]:dsihc_bottom:v16+:dsiswitch_bottom@[DSI=(1,0)][side=bottom]:dsihc_bottom:v18"
	switch ":dsiswitch_bottom@[DSI=(1,0)][side=bottom]:dsihc_bottom:18,65"
	switch ":hvswitch@[UDB=(3,0)][side=left]:4,65_f"
	switch ":hvswitch@[UDB=(3,0)][side=left]:vseg_4_top_b"
	switch ":hvswitch@[UDB=(2,0)][side=left]:vseg_4_top_b"
	switch ":hvswitch@[UDB=(1,0)][side=left]:vseg_4_top_b"
	switch ":hvswitch@[UDB=(0,0)][side=left]:4,86_b"
	switch ":hvswitch@[UDB=(0,0)][side=left]:hseg_86_f"
	switch ":dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:124,86_f"
	switch "IStub-:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v122+:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v124+:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v126"
	switch "Stub-:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v122+:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v124+:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v126==>:i2ccell.scl_in"
	term   ":i2ccell.scl_in"
end \I2C_1:Net_1109_0\
net \I2C_1:Net_1109_1\
	term   ":ioport12:pin1.fb"
	switch ":ioport12:pin1.fb==>Stub-:dsiswitch_bottom@[DSI=(1,0)][side=bottom]:dsihc_bottom:v17+:dsiswitch_bottom@[DSI=(1,0)][side=bottom]:dsihc_bottom:v19"
	switch "OStub-:dsiswitch_bottom@[DSI=(1,0)][side=bottom]:dsihc_bottom:v17+:dsiswitch_bottom@[DSI=(1,0)][side=bottom]:dsihc_bottom:v19"
	switch ":dsiswitch_bottom@[DSI=(1,0)][side=bottom]:dsihc_bottom:17,67"
	switch ":hvswitch@[UDB=(3,0)][side=left]:3,67_f"
	switch ":hvswitch@[UDB=(3,0)][side=left]:vseg_3_top_b"
	switch ":hvswitch@[UDB=(2,0)][side=left]:vseg_3_top_b"
	switch ":hvswitch@[UDB=(1,0)][side=left]:vseg_3_top_b"
	switch ":hvswitch@[UDB=(0,0)][side=left]:3,93_b"
	switch ":hvswitch@[UDB=(0,0)][side=left]:hseg_93_f"
	switch ":dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:127,93_f"
	switch "IStub-:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v123+:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v125+:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v127"
	switch "Stub-:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v123+:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v125+:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v127==>:i2ccell.sda_in"
	term   ":i2ccell.sda_in"
end \I2C_1:Net_1109_1\
net \I2C_1:Net_643_0\
	term   ":i2ccell.scl_out"
	switch ":i2ccell.scl_out==>Stub-:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v16+:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v18"
	switch "OStub-:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v16+:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v18"
	switch ":dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:18,82"
	switch ":hvswitch@[UDB=(0,0)][side=left]:18,82_f"
	switch ":hvswitch@[UDB=(1,0)][side=left]:vseg_18_top_f"
	switch ":hvswitch@[UDB=(2,0)][side=left]:vseg_18_top_f"
	switch ":hvswitch@[UDB=(3,0)][side=left]:vseg_18_top_f"
	switch ":hvswitch@[UDB=(3,0)][side=left]:18,77_b"
	switch ":hvswitch@[UDB=(3,0)][side=left]:hseg_77_b"
	switch ":dsiswitch_bottom@[DSI=(1,0)][side=bottom]:dsihc_bottom:120,77_f"
	switch "IStub-:dsiswitch_bottom@[DSI=(1,0)][side=bottom]:dsihc_bottom:v116+:dsiswitch_bottom@[DSI=(1,0)][side=bottom]:dsihc_bottom:v118+:dsiswitch_bottom@[DSI=(1,0)][side=bottom]:dsihc_bottom:v120"
	switch "Stub-:dsiswitch_bottom@[DSI=(1,0)][side=bottom]:dsihc_bottom:v116+:dsiswitch_bottom@[DSI=(1,0)][side=bottom]:dsihc_bottom:v118+:dsiswitch_bottom@[DSI=(1,0)][side=bottom]:dsihc_bottom:v120==>:ioport12:inputs1_mux.in_0"
	switch ":ioport12:inputs1_mux.pin0__pin_input==>:ioport12:pin0.pin_input"
	term   ":ioport12:pin0.pin_input"
end \I2C_1:Net_643_0\
net \I2C_1:Net_697\
	term   ":i2ccell.interrupt"
	switch ":i2ccell.interrupt==>Stub-:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v20+:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v22"
	switch "OStub-:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v20+:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v22"
	switch ":dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:20,88"
	switch ":hvswitch@[UDB=(0,0)][side=left]:16,88_f"
	switch ":hvswitch@[UDB=(1,0)][side=left]:vseg_16_top_f"
	switch ":hvswitch@[UDB=(2,0)][side=left]:vseg_16_top_f"
	switch ":hvswitch@[UDB=(3,0)][side=left]:vseg_16_top_f"
	switch ":hvswitch@[UDB=(3,0)][side=left]:16,60_b"
	switch ":hvswitch@[UDB=(3,1)][side=left]:hseg_60_f"
	switch ":hvswitch@[UDB=(3,2)][side=left]:hseg_60_f"
	switch ":dsiswitch_bottom@[DSI=(1,3)][side=bottom]:dsihc_bottom:59,60_f"
	switch "IStub-:dsiswitch_bottom@[DSI=(1,3)][side=bottom]:dsihc_bottom:v57+:dsiswitch_bottom@[DSI=(1,3)][side=bottom]:dsihc_bottom:v59"
	switch "Stub-:dsiswitch_bottom@[DSI=(1,3)][side=bottom]:dsihc_bottom:v57+:dsiswitch_bottom@[DSI=(1,3)][side=bottom]:dsihc_bottom:v59==>:interrupt_idmux_15.in_2"
	switch ":interrupt_idmux_15.interrupt_idmux_15__out==>:interrupt_15.interrupt"
	term   ":interrupt_15.interrupt"
end \I2C_1:Net_697\
net \I2C_1:sda_x_wire\
	term   ":i2ccell.sda_out"
	switch ":i2ccell.sda_out==>Stub-:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v17+:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v19"
	switch "OStub-:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v17+:dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:v19"
	switch ":dsiswitch_top@[DSI=(0,1)][side=top]:dsihc_top:19,16"
	switch ":hvswitch@[UDB=(0,0)][side=left]:23,16_f"
	switch ":hvswitch@[UDB=(1,0)][side=left]:vseg_23_top_f"
	switch ":hvswitch@[UDB=(2,0)][side=left]:vseg_23_top_f"
	switch ":hvswitch@[UDB=(3,0)][side=left]:vseg_23_top_f"
	switch ":hvswitch@[UDB=(3,0)][side=left]:23,28_b"
	switch ":hvswitch@[UDB=(3,0)][side=left]:hseg_28_b"
	switch ":dsiswitch_bottom@[DSI=(1,0)][side=bottom]:dsihc_bottom:119,28_f"
	switch "IStub-:dsiswitch_bottom@[DSI=(1,0)][side=bottom]:dsihc_bottom:v117+:dsiswitch_bottom@[DSI=(1,0)][side=bottom]:dsihc_bottom:v119+:dsiswitch_bottom@[DSI=(1,0)][side=bottom]:dsihc_bottom:v121"
	switch "Stub-:dsiswitch_bottom@[DSI=(1,0)][side=bottom]:dsihc_bottom:v117+:dsiswitch_bottom@[DSI=(1,0)][side=bottom]:dsihc_bottom:v119+:dsiswitch_bottom@[DSI=(1,0)][side=bottom]:dsihc_bottom:v121==>:ioport12:inputs1_mux.in_1"
	switch ":ioport12:inputs1_mux.pin1__pin_input==>:ioport12:pin1.pin_input"
	term   ":ioport12:pin1.pin_input"
end \I2C_1:sda_x_wire\
