<?xml version="1.0" encoding="utf-8"?>
<blockRegMap version="1" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:schemaLocation="http://cypress.com/xsd/cyblockregmap cyblockregmap.xsd" xmlns="http://cypress.com/xsd/cyblockregmap">
  <block name="CDC" BASE="0x0" SIZE="0x0" desc="USBFS" visible="true" hidden="false">
    <block name="ep_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="ZeroTerminal_4" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="bus_reset" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="ep_0" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="ZeroTerminal_5" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="ZeroTerminal_6" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="VirtualMux_5" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="VirtualMux_6" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="arb_int" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="VirtualMux_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="ZeroTerminal_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="VirtualMux_4" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="ZeroTerminal_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="VirtualMux_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="sof_int" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="VirtualMux_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="Dm" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="dp_int" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="Dp" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="VirtualMux_7" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="VirtualMux_8" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="ZeroTerminal_7" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="USB" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="ep_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="ep_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="ZeroTerminal_8" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <register name="INTR_CAUSE_HIGH" address="0x40006008" bitWidth="32" desc="High priority interrupt Cause register" hidden="true">
      <field name="SOF_INTR" from="0" to="0" access="RW" resetVal="" desc="USB SOF Interrupt." hidden="false" />
      <field name="BUS_RESET_INTR" from="1" to="1" access="RW" resetVal="" desc="BUS RESET Interrupt." hidden="false" />
      <field name="EP0_INTR" from="2" to="2" access="RW" resetVal="" desc="EP0 Interrupt." hidden="false" />
      <field name="LPM_INTR" from="3" to="3" access="RW" resetVal="" desc="LPM Interrupt." hidden="false" />
      <field name="RESUME_INTR" from="4" to="4" access="RW" resetVal="" desc="Resume Interrupt." hidden="false" />
      <field name="ARB_EP_INTR" from="7" to="7" access="RW" resetVal="" desc="Arbiter Endpoint Interrupt." hidden="false" />
      <field name="EP1_INTR" from="8" to="8" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
      <field name="EP2_INTR" from="9" to="9" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
      <field name="EP3_INTR" from="10" to="10" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
      <field name="EP4_INTR" from="11" to="11" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
      <field name="EP5_INTR" from="12" to="12" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
      <field name="EP6_INTR" from="13" to="13" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
      <field name="EP7_INTR" from="14" to="14" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
      <field name="EP8_INTR" from="15" to="15" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
    </register>
    <register name="LPM_CTRL" address="0x40006008" bitWidth="32" desc="LPM Control Register" hidden="true">
      <field name="LPM_EN" from="0" to="0" access="RW" resetVal="" desc="LPM enable." hidden="false">
        <value name="Disable" value="0" desc="LPM token will not get a response (backward compatibility mode)." />
        <value name="Enable" value="1" desc="LPM token will get a handshake response (ACK, STALL, NYET or NAK). A STALL will be sent if the bLinkState is not 0001b. A NYET, NAK or ACK response will be sent depending on the NYET_EN and LPM_ACK_RESP bits below." />
      </field>
      <field name="LPM_ACK_RESP" from="1" to="1" access="RW" resetVal="" desc="LPM ACK response enable (if LPM_EN=1), to allow firmware to refuse a low power request." hidden="false">
        <value name="NYET_NACK" value="0" desc="A LPM token will get a NYET or NAK (depending on NYET_EN bit below) response and the device will NOT go to a low power mode." />
        <value name="ACK" value="1" desc="A LPM token will get an ACK response and the device will go to the requested low power mode." />
      </field>
      <field name="NYET_EN" from="2" to="2" access="RW" resetVal="" desc="Allow firmware to choose which response to use for an LPM token (LPM_EN=1) when the device is NOT ready to go to the requested low power mode (LPM_ACK_RESP=0)." hidden="false">
        <value name="NYET" value="0" desc="A LPM token will get an NAK response (indicating a CRC error),  the host is expected to repeat the LPM token." />
        <value name="NACK" value="1" desc="A LPM token will get a NYET response." />
      </field>
      <field name="SUB_RESP" from="4" to="4" access="RW" resetVal="" desc="Enable a STALL response for all undefined SubPIDs, i.e. other than LPM (0011b). If not enabled then there will be no response (Error) for the undefined SubPIDs." hidden="false" />
    </register>
    <register name="CR0" address="0x40006008" bitWidth="8" desc="USB Control 0 Register" hidden="false">
      <field name="DEVICE_ADDRESS" from="6" to="0" access="R" resetVal="" desc="These bits specify the USB device address to which the SIE will respond. This address must be set by firmware and is specified by the USB Host with a SET ADDRESS command during USB enumeration. This value must be programmed by firmware when assigned during enumeration. It is not set automatically by the hardware." hidden="false" />
      <field name="USB_ENABLE" from="7" to="7" access="RW" resetVal="" desc="This bit enables the device to respond to USB traffic." hidden="false">
        <value name="Disabled" value="0" desc="Block responds to USB traffic." />
        <value name="Enabled" value="1" desc="Block does not respond to USB traffic." />
      </field>
    </register>
    <register name="INTR_LVL_SEL" address="0x40006008" bitWidth="32" desc="Select interrupt level for each interrupt source" hidden="true">
      <field name="SOF_LVL_SEL" from="1" to="0" access="RW" resetVal="" desc="USB SOF Interrupt level select." hidden="false" />
      <field name="BUS_RESET_LVL_SEL" from="3" to="2" access="RW" resetVal="" desc="BUS RESET Interrupt level select." hidden="false" />
      <field name="EP0_LVL_SEL" from="5" to="4" access="RW" resetVal="" desc="EP0 Interrupt level select." hidden="false" />
      <field name="LPM_LVL_SEL" from="7" to="6" access="RW" resetVal="" desc="LPM Interrupt level select." hidden="false" />
      <field name="RESUME_LVL_SEL" from="9" to="8" access="RW" resetVal="" desc="Resume Interrupt level select." hidden="false" />
      <field name="ARB_EP_LVL_SEL" from="15" to="14" access="RW" resetVal="" desc="Arbiter Endpoint Interrupt level select." hidden="false" />
      <field name="EP1_LVL_SEL" from="17" to="16" access="RW" resetVal="" desc="EP1 Interrupt level select." hidden="false" />
      <field name="EP2_LVL_SEL" from="19" to="18" access="RW" resetVal="" desc="EP2 Interrupt level select." hidden="false" />
      <field name="EP3_LVL_SEL" from="21" to="20" access="RW" resetVal="" desc="EP3 Interrupt level select." hidden="false" />
      <field name="EP4_LVL_SEL" from="23" to="22" access="RW" resetVal="" desc="EP4 Interrupt level select." hidden="false" />
      <field name="EP5_LVL_SEL" from="25" to="24" access="RW" resetVal="" desc="EP5 Interrupt level select." hidden="false" />
      <field name="EP6_LVL_SEL" from="27" to="26" access="RW" resetVal="" desc="EP6 Interrupt level select." hidden="false" />
      <field name="EP7_LVL_SEL" from="29" to="28" access="RW" resetVal="" desc="EP7 Interrupt level select." hidden="false" />
      <field name="EP8_LVL_SEL" from="31" to="30" access="RW" resetVal="" desc="EP8 Interrupt level select." hidden="false" />
    </register>
    <register name="INTR_SIE_MASK" address="0x40006008" bitWidth="32" desc="USB SOF, BUS RESET and EP0 Interrupt Mask" hidden="true">
      <field name="SOF_INTR" from="0" to="0" access="RW" resetVal="" desc="USB SOF Interrupt." hidden="false" />
      <field name="BUS_RESET_INTR" from="1" to="1" access="RW" resetVal="" desc="BUS RESET Interrupt." hidden="false" />
      <field name="EP0_INTR" from="2" to="2" access="RW" resetVal="" desc="EP0 Interrupt." hidden="false" />
      <field name="LPM_INTR" from="3" to="3" access="RW" resetVal="" desc="LPM Interrupt." hidden="false" />
      <field name="RESUME_INTR" from="4" to="4" access="RW" resetVal="" desc="Resume Interrupt." hidden="false" />
    </register>
    <register name="CHGDET_CTRL" address="0x40006008" bitWidth="32" desc="Charger Detection Control Register" hidden="true">
      <field name="COMP_DP" from="0" to="0" access="RW" resetVal="" desc="Connect the primary/secondary detection comparator and current sink  to D+." hidden="false" />
      <field name="COMP_DM" from="1" to="1" access="RW" resetVal="" desc="Connect the primary/secondary detection comparator and current sink to D-." hidden="false" />
      <field name="COMP_EN" from="2" to="2" access="RW" resetVal="" desc="Enable the primary/secondary detection comparator and current sink. This bit can be written concurrently with COMP_DP/COMP_DM.  Note that REF_EN must also be 1 for the comparator to work (because it receives a reference from it)." hidden="false" />
      <field name="REF_DP" from="3" to="3" access="RW" resetVal="" desc="Connect the primary/secondary detection reference driver to D+." hidden="false" />
      <field name="REF_DM" from="4" to="4" access="RW" resetVal="" desc="Connect the primary/secondary detection reference driver to D-." hidden="false" />
      <field name="REF_EN" from="5" to="5" access="RW" resetVal="" desc="Enable the primary/secondary reference driver.  This bit can be written concurrently with REF_DP/REF_DM." hidden="false" />
      <field name="DCD_SRC_EN" from="6" to="6" access="RW" resetVal="" desc="Enable the Data Contact Detect current source on D+." hidden="false" />
      <field name="ADFT_CTRL" from="13" to="12" access="RW" resetVal="" desc="ADFT option to bring out buffered version of voltage reference input or adft intput to ADFT output (adft_out)." hidden="false">
        <value name="ADFT_NORMAL" value="00" desc="Normal operating mode, reference buffer used to generate internal references.  adft_out pulled low." />
        <value name="ADFT_VBG" value="01" desc="Use reference buffer to bring out voltage reference input (vbg) onto adft_out." />
        <value name="ADFT_DONTUSE" value="10" desc="Illegal - do not use." />
        <value name="ADFT_ADFTIN" value="11" desc="Use reference buffer to bring out buffered version of system level adft input (adft_in) onto adft_out." />
      </field>
      <field name="COMP_OUT" from="31" to="31" access="RW" resetVal="" desc="Output of the primary/secondary detection comparator.  This output is not filtered or debounced and must be polled in software." hidden="false" />
    </register>
    <register name="LPM_STAT" address="0x40006008" bitWidth="32" desc="LPM Status register" hidden="true">
      <field name="LPM_BESL" from="3" to="0" access="RW" resetVal="" desc="Best Effort Service Latency. This value should match either the Baseline (DeepSleep) or Deep (Hibernate) BESL in the BOS descriptor." hidden="false" />
      <field name="LPM_REMOTEWAKE" from="4" to="4" access="RW" resetVal="" desc="LPM ACK response enable (if LPM_EN=1), to allow firmware to refuse a low power request." hidden="false">
        <value name="Prohibited" value="0" desc="Device is prohibited from initiating a remote wake." />
        <value name="Allowed" value="1" desc="Device is allow to wake the host." />
      </field>
    </register>
    <register name="`INTR_SIE" address="0x40006008" bitWidth="32" desc="USB SOF, BUS RESET and EP0 Interrupt Status" hidden="true">
      <field name="SOF_INTR" from="0" to="0" access="RW" resetVal="" desc="USB SOF Interrupt." hidden="false" />
      <field name="BUS_RESET_INTR" from="1" to="1" access="RW" resetVal="" desc="BUS RESET Interrupt." hidden="false" />
      <field name="EP0_INTR" from="2" to="2" access="RW" resetVal="" desc="EP0 Interrupt." hidden="false" />
      <field name="LPM_INTR" from="3" to="3" access="RW" resetVal="" desc="LPM Interrupt." hidden="false" />
      <field name="RESUME_INTR" from="4" to="4" access="RW" resetVal="" desc="Resume Interrupt." hidden="false" />
    </register>
    <register name="POWER_CTRL" address="0x40006008" bitWidth="32" desc="Power Control Register" hidden="true">
      <field name="VBUS_VALID_OVR" from="1" to="0" access="RW" resetVal="" desc="Overrides the value received from the GPIO input buffer connected to VBUS" hidden="false">
        <value name="FORCE_VALID_0" value="00" desc="Force vbus_valid = 0." />
        <value name="FORCE_VALID_1" value="01" desc="Force vbus_valid = 1." />
        <value name="GPIO_VALID" value="10" desc="Use vbus_valid signal from GPIO input." />
        <value name="PHY_VALID" value="11" desc="Use vbus_valid signal from PHY detector." />
      </field>
      <field name="SUSPEND" from="2" to="2" access="RW" resetVal="" desc="Put PHY into Suspend mode. If the PHY is enabled, this bit MUST be set before entering a low power mode (DeepSleep/Hibernate)." hidden="false" />
      <field name="SUSPEND_DEL" from="3" to="3" access="RW" resetVal="" desc="Delayed version of SUSPEND. Always set SUSPEND and SUSPEND_DEL together in a single register write.  When taking PHY out of suspend mode, first clear SUSPEND, then clear SUSPEND_DEL at least 2us later." hidden="false" />
      <field name="ISOLATE" from="4" to="4" access="RW" resetVal="" desc="Isolates the PHY outputs. Clear this bit at least 2us after vbus is known to be valid (vbus_valid=1). Isolation will be forced when vbus_valid goes low (see VBUS_VALID_OVR)." hidden="false" />
      <field name="CHDET_PWR_CTL" from="6" to="5" access="RW" resetVal="" desc="Power programmability for bandgap voltage buffer in the charger detect block.  See s8bg_vrefbuf public cell for more information. Default '0' is low power mode." hidden="false" />
      <field name="ENABLE_DM_PULLDOWN" from="26" to="26" access="RW" resetVal="" desc="Enables the ~15k pull down on the DM, default off. The 15k pull down is needed for Data Contact Detection (DCD)." hidden="false" />
      <field name="ENABLE_VBUS_PULLDOWN" from="26" to="26" access="RW" resetVal="" desc="Enables the weak pull down on the VBUS, default on, to prevent floating node crow bar currents." hidden="false" />
      <field name="ENABLE_RCVR" from="27" to="27" access="RW" resetVal="" desc="Enables the differential USB receiver." hidden="false" />
      <field name="ENABLE_DPO" from="28" to="28" access="RW" resetVal="" desc="Enables the single ended receiver on D+." hidden="false" />
      <field name="ENABLE_DMO" from="29" to="29" access="RW" resetVal="" desc="Enables the signle ended receiver on D-." hidden="false" />
      <field name="ENABLE_CHGDET" from="30" to="30" access="RW" resetVal="" desc="Enables the charger detection circuitry.  After USB has connected, this circuitry can be disabled to save power." hidden="false" />
      <field name="ENABLE" from="31" to="31" access="RW" resetVal="" desc="Mast enable of PHY and Charger Detector.  Nothing will work until this bit is set." hidden="false" />
    </register>
    <register name="INTR_CAUSE_MED" address="0x40006008" bitWidth="32" desc="Medium priority interrupt Cause register" hidden="true">
      <field name="SOF_INTR" from="0" to="0" access="RW" resetVal="" desc="USB SOF Interrupt." hidden="false" />
      <field name="BUS_RESET_INTR" from="1" to="1" access="RW" resetVal="" desc="BUS RESET Interrupt." hidden="false" />
      <field name="EP0_INTR" from="2" to="2" access="RW" resetVal="" desc="EP0 Interrupt." hidden="false" />
      <field name="LPM_INTR" from="3" to="3" access="RW" resetVal="" desc="LPM Interrupt." hidden="false" />
      <field name="RESUME_INTR" from="4" to="4" access="RW" resetVal="" desc="Resume Interrupt." hidden="false" />
      <field name="ARB_EP_INTR" from="7" to="7" access="RW" resetVal="" desc="Arbiter Endpoint Interrupt." hidden="false" />
      <field name="EP1_INTR" from="8" to="8" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
      <field name="EP2_INTR" from="9" to="9" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
      <field name="EP3_INTR" from="10" to="10" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
      <field name="EP4_INTR" from="11" to="11" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
      <field name="EP5_INTR" from="12" to="12" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
      <field name="EP6_INTR" from="13" to="13" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
      <field name="EP7_INTR" from="14" to="14" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
      <field name="EP8_INTR" from="15" to="15" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
    </register>
    <register name="INTR_CAUSE_LO" address="0x40006008" bitWidth="32" desc="Low priority interrupt Cause register" hidden="true">
      <field name="SOF_INTR" from="0" to="0" access="RW" resetVal="" desc="USB SOF Interrupt." hidden="false" />
      <field name="BUS_RESET_INTR" from="1" to="1" access="RW" resetVal="" desc="BUS RESET Interrupt." hidden="false" />
      <field name="EP0_INTR" from="2" to="2" access="RW" resetVal="" desc="EP0 Interrupt." hidden="false" />
      <field name="LPM_INTR" from="3" to="3" access="RW" resetVal="" desc="LPM Interrupt." hidden="false" />
      <field name="RESUME_INTR" from="4" to="4" access="RW" resetVal="" desc="Resume Interrupt." hidden="false" />
      <field name="ARB_EP_INTR" from="7" to="7" access="RW" resetVal="" desc="Arbiter Endpoint Interrupt." hidden="false" />
      <field name="EP1_INTR" from="8" to="8" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
      <field name="EP2_INTR" from="9" to="9" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
      <field name="EP3_INTR" from="10" to="10" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
      <field name="EP4_INTR" from="11" to="11" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
      <field name="EP5_INTR" from="12" to="12" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
      <field name="EP6_INTR" from="13" to="13" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
      <field name="EP7_INTR" from="14" to="14" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
      <field name="EP8_INTR" from="15" to="15" access="RW" resetVal="" desc="EP1 Interrupt." hidden="false" />
    </register>
    <register name="CR1" address="0x40006009" bitWidth="8" desc="USB Control 1 Register" hidden="false">
      <field name="REG_ENABLE" from="0" to="0" access="R" resetVal="" desc="This bit controls the operation of the internal USB regulator. For applications with supply voltages in the 5V range this bit is set high to enable the internal regulator. For device supply voltage in the 3.3V range this bit is cleared to connect the transceiver directly to the supply." hidden="false">
        <value name="Disabled" value="0" desc="Regulator for 5V is disabled." />
        <value name="Enabled" value="1" desc="Regulator for 5V is enabled." />
      </field>
      <field name="ENABLE_LOCK" from="1" to="1" access="RW" resetVal="" desc="This bit is set to turn on the automatic frequency locking of the internal oscillator to USB traffic.  Unless an external clock is being provided this bit should remain set for proper USB operation." hidden="false" />
      <field name="BUS_ACTIVITY" from="2" to="2" access="RW" resetVal="" desc="The Bus Activity bit is a stickybit that detects any non-idle USB event that has occurred on the USB bus. Once set to High by the SIE to indicate the bus activity this bit retains its logical High value until firmware clears it." hidden="false" />
      <field name="TRIM_OFFSET_MSB" from="3" to="3" access="RW" resetVal="" desc="This bit enables trim bit[7]." hidden="false" />
    </register>
    <register name="SIE_EP_INT_EN" address="0x4000600A" bitWidth="8" desc="USB SIE Data Endpoints Interrupt Enable Register" hidden="false">
      <field name="EP1_INTR_EN" from="0" to="0" access="RW" resetVal="" desc="Enables interrupt for EP1." hidden="false" />
      <field name="EP2_INTR_EN" from="1" to="1" access="RW" resetVal="" desc="Enables interrupt for EP2." hidden="false" />
      <field name="EP3_INTR_EN" from="2" to="2" access="RW" resetVal="" desc="Enables interrupt for EP3." hidden="false" />
      <field name="EP4_INTR_EN" from="3" to="3" access="RW" resetVal="" desc="Enables interrupt for EP4." hidden="false" />
      <field name="EP5_INTR_EN" from="4" to="4" access="RW" resetVal="" desc="Enables interrupt for EP5." hidden="false" />
      <field name="EP6_INTR_EN" from="5" to="5" access="RW" resetVal="" desc="Enables interrupt for EP6." hidden="false" />
      <field name="EP7_INTR_EN" from="6" to="6" access="RW" resetVal="" desc="Enables interrupt for EP7." hidden="false" />
      <field name="EP8_INTR_EN" from="7" to="7" access="RW" resetVal="" desc="Enables interrupt for EP8." hidden="false" />
    </register>
    <register name="SIE_EP_INT_SR" address="0x4000600B" bitWidth="8" desc="SIE Data Endpoint Interrupt Status Register" hidden="false">
      <field name="EP1_INTR" from="0" to="0" access="RW" resetVal="" desc="Interrupt status for EP1." hidden="false" />
      <field name="EP2_INTR" from="1" to="1" access="RW" resetVal="" desc="Interrupt status for EP2." hidden="false" />
      <field name="EP3_INTR" from="2" to="2" access="RW" resetVal="" desc="Interrupt status for EP3." hidden="false" />
      <field name="EP4_INTR" from="3" to="3" access="RW" resetVal="" desc="Interrupt status for EP4." hidden="false" />
      <field name="EP5_INTR" from="4" to="4" access="RW" resetVal="" desc="Interrupt status for EP5." hidden="false" />
      <field name="EP6_INTR" from="5" to="5" access="RW" resetVal="" desc="Interrupt status for EP6." hidden="false" />
      <field name="EP7_INTR" from="6" to="6" access="RW" resetVal="" desc="Interrupt status for EP7." hidden="false" />
      <field name="EP8_INTR" from="7" to="7" access="RW" resetVal="" desc="Interrupt status for EP8." hidden="false" />
    </register>
    <register name="SIE_EP1_CNT0" address="0x4000600C" bitWidth="8" desc="SIE Endpoint 1 Count0 Register" hidden="false">
      <field name="DATA_COUNT_MSB" from="2" to="0" access="RW" resetVal="" desc="These bits are the 3 MSb bits of an 11-bit counter. The LSb are the Data Count[7:0] bits of the CNT1 register. Refer to the CNT1 register for more information." hidden="false" />
      <field name="DATA_VALID" from="4" to="4" access="RW" resetVal="" desc="DATA_ERROR - 0, DATA_VALID - 1." hidden="false" />
      <field name="DATA_TOGGLE" from="7" to="7" access="RW" resetVal="" desc="This bit selects the DATA packet's toggle state. For IN transactions firmware must set this bit to the expected state. For OUT transactions the hardware sets this bit to the state of the received Data Toggle bit." hidden="false" />
    </register>
    <register name="SIE_EP1_CNT1" address="0x4000600D" bitWidth="8" desc="SIE Endpoint 1 Count1 Register" hidden="false">
      <field name="DATA_COUNT" from="7" to="0" access="RW" resetVal="" desc="These bits are the 8 LSb of a 11-bit counter.  The 3 MSb bits are in the CNT0 register. The 11-bit count indicates the number of data bytes in a transaction." hidden="false" />
    </register>
    <register name="SIE_EP1_CR0" address="0x4000600E" bitWidth="8" desc="SIE Endpoint 1 Control Register" hidden="false">
      <field name="MODE" from="3" to="0" access="RW" resetVal="" desc="The mode controls how the USB SIE responds to traffic and how the USB SIE changes the mode of that endpoint as a result of host packets to the endpoint." hidden="false">
        <value name="DISABLE" value="0000" desc="Ignore all USB traffic to this endpoint." />
        <value name="NAK_INOUT" value="0001" desc="SETUP: Accept, IN: NAK, OUT: NAK." />
        <value name="STATUS_OUT_ONLY" value="0010" desc="SETUP: Accept, IN: STALL, OUT: ACK 0B tokens, NAK others." />
        <value name="STALL_INOUT" value="0011" desc="SETUP: Accept, IN: STALL, OUT: STALL." />
        <value name="ISO_OUT" value="0101" desc="SETUP: Ignore, IN: Ignore, OUT: Accept Isochronous OUT token." />
        <value name="STATUS_IN_ONLY" value="0110" desc="SETUP: Accept, IN: Respond with 0B data, OUT:  Stall." />
        <value name="ISO_IN" value="0111" desc="SETUP: Ignore, IN: Accept Isochronous IN token, OUT: Ignore." />
        <value name="NAK_OUT" value="1000" desc="SETUP: Ignore, IN: Ignore, OUT: NAK." />
        <value name="ACK_OUT" value="1001" desc="SETUP: Ignore, IN: Ignore, OUT: Accept data and ACK if STALL = 0, STALL otherwise. Change to MODE=8 after one succesfull OUT token." />
        <value name="ACK_OUT_STATUS_IN" value="1011" desc="SETUP: Accept, IN: Respond with 0B data, OUT:  Accept data." />
        <value name="NAK_IN" value="1100" desc="SETUP: Ignore, IN: NAK, OUT: Ignore." />
        <value name="ACK_IN" value="1101" desc="SETUP: Ignore, IN: Respond to IN with data if STALL=0, STALL otherwise, OUT: Ignore" />
        <value name="ACK_IN STATUS OUT" value="1111" desc="SETUP: Accept, IN: Respond to IN with data, OUT: ACK 0B tokens, NAK others." />
      </field>
      <field name="ACKED_TXN" from="4" to="4" access="RW" resetVal="" desc="ACKED_NO - 0, ACKED_YES - 1." hidden="false" />
      <field name="NAK_INT_EN" from="5" to="5" access="RW" resetVal="" desc="When set this bit causes an endpoint interrupt to be generated even when a transfer completes with a NAK." hidden="false" />
      <field name="ERR_IN_TXN" from="6" to="6" access="RW" resetVal="" desc="The Error in transaction bit is set whenever an error is detected." hidden="false" />
      <field name="STALL" from="7" to="7" access="RW" resetVal="" desc="When this bit is set the SIE stalls an OUT packet if the Mode bits are set to ACK-OUT. The SIE stalls an IN packet if the mode bits are set to ACK-IN. This bit must be clear for all other modes." hidden="false" />
    </register>
    <register name="USBIO_CR0" address="0x40006010" bitWidth="8" desc="USBIO Control 0 Register" hidden="false">
      <field name="RD" from="0" to="0" access="R" resetVal="" desc="Received Data. This read only bit gives the state of the USB differential receiver." hidden="false">
        <value name="DIFF_LOW" value="0" desc="D+ less than D- (K state), or D+=D-=0 (SE0)." />
        <value name="DIFF_HIGH" value="1" desc="D+ greater than D- (J state)." />
      </field>
      <field name="TD" from="5" to="5" access="RW" resetVal="" desc="Transmit Data. Transmit a USB J or K state on the USB bus. No effect if TEN=0 or TSE0=1." hidden="false">
        <value name="DIFF_K" value="0" desc="Force USB K state (D+ is low D- is high)." />
        <value name="DIFF_J" value="1" desc="Force USB J state (D+ is high D- is low)." />
      </field>
      <field name="TSE0" from="6" to="6" access="RW" resetVal="" desc="Transmit Single-Ended Zero. SE0: both D+ and D- low. No effect if TEN=0." hidden="false" />
      <field name="TEN" from="7" to="7" access="RW" resetVal="" desc="USB Transmit Enable. This is used to manually transmit on the D+ and D- pins. Normally this bit should be cleared to allow the internal SIE to drive the pins. The most common reason for manually transmitting is to force a resume state on the bus." hidden="false" />
    </register>
    <register name="USBIO_CR1" address="0x40006012" bitWidth="8" desc="USBIO Control 1 Register" hidden="false">
      <field name="DMO" from="0" to="0" access="R" resetVal="" desc="This read only bit gives the state of the D- pin." hidden="false" />
      <field name="DPO" from="1" to="1" access="R" resetVal="" desc="This read only bit gives the state of the D+ pin." hidden="false" />
      <field name="USBPUEN" from="2" to="2" access="RW" resetVal="" desc="This bit enables the connection of the internal 1.5 k pull up resistor on the D+ pin." hidden="false" />
      <field name="IOMODE" from="5" to="5" access="RW" resetVal="" desc="This bit allows the D+ and D- pins to be configured for either USB mode or bit-banged modes. If this bit is set the DMI and DPI bits are used to drive the D- and D+ pins." hidden="false">
        <value name="Bit-banged" value="0" desc="Bit-banged mode for Dm and Dp." />
        <value name="USB" value="1" desc="USB block controls Dm and Dp." />
      </field>
    </register>
    <register name="DYN_RECONFIG" address="0x40006014" bitWidth="8" desc="USB Dynamic reconfiguration Register" hidden="true">
      <field name="DYN_CONFIG_EN" from="0" to="0" access="RW" resetVal="" desc="This bit is used to enable the dynamic re-configuration for the selected EP. If set to 1, indicates the reconfiguration required for selected EP. Use 0 for EP1, 1 for EP2, etc." hidden="false" />
      <field name="DYN_RECONFIG_EPNO" from="3" to="1" access="RW" resetVal="" desc="These bits indicates the EP number for which reconfiguration is required when dyn_config_en bit is set to 1." hidden="false" />
      <field name="DYN_RECONFIG_RDY_STS" from="4" to="4" access="R" resetVal="" desc="This bit indicates the ready status for the dynamic reconfiguration, when set to 1, indicates the block is ready for reconfiguration." hidden="false" />
    </register>
    <register name="SIE_EP2_CNT0" address="0x4000601C" bitWidth="8" desc="SIE Endpoint 1 Count0 Register" hidden="false">
      <field name="DATA_COUNT_MSB" from="2" to="0" access="RW" resetVal="" desc="These bits are the 3 MSb bits of an 11-bit counter. The LSb are the Data Count[7:0] bits of the CNT1 register. Refer to the CNT1 register for more information." hidden="false" />
      <field name="DATA_VALID" from="4" to="4" access="RW" resetVal="" desc="DATA_ERROR - 0, DATA_VALID - 1." hidden="false" />
      <field name="DATA_TOGGLE" from="7" to="7" access="RW" resetVal="" desc="This bit selects the DATA packet's toggle state. For IN transactions firmware must set this bit to the expected state. For OUT transactions the hardware sets this bit to the state of the received Data Toggle bit." hidden="false" />
    </register>
    <register name="SIE_EP2_CNT1" address="0x4000601D" bitWidth="8" desc="SIE Endpoint 1 Count1 Register" hidden="false">
      <field name="DATA_COUNT" from="7" to="0" access="RW" resetVal="" desc="These bits are the 8 LSb of a 11-bit counter.  The 3 MSb bits are in the CNT0 register. The 11-bit count indicates the number of data bytes in a transaction." hidden="false" />
    </register>
    <register name="SIE_EP2_CR0" address="0x4000601E" bitWidth="8" desc="SIE Endpoint 1 Control Register" hidden="false">
      <field name="MODE" from="3" to="0" access="RW" resetVal="" desc="The mode controls how the USB SIE responds to traffic and how the USB SIE changes the mode of that endpoint as a result of host packets to the endpoint." hidden="false">
        <value name="DISABLE" value="0000" desc="Ignore all USB traffic to this endpoint." />
        <value name="NAK_INOUT" value="0001" desc="SETUP: Accept, IN: NAK, OUT: NAK." />
        <value name="STATUS_OUT_ONLY" value="0010" desc="SETUP: Accept, IN: STALL, OUT: ACK 0B tokens, NAK others." />
        <value name="STALL_INOUT" value="0011" desc="SETUP: Accept, IN: STALL, OUT: STALL." />
        <value name="ISO_OUT" value="0101" desc="SETUP: Ignore, IN: Ignore, OUT: Accept Isochronous OUT token." />
        <value name="STATUS_IN_ONLY" value="0110" desc="SETUP: Accept, IN: Respond with 0B data, OUT:  Stall." />
        <value name="ISO_IN" value="0111" desc="SETUP: Ignore, IN: Accept Isochronous IN token, OUT: Ignore." />
        <value name="NAK_OUT" value="1000" desc="SETUP: Ignore, IN: Ignore, OUT: NAK." />
        <value name="ACK_OUT" value="1001" desc="SETUP: Ignore, IN: Ignore, OUT: Accept data and ACK if STALL = 0, STALL otherwise. Change to MODE=8 after one succesfull OUT token." />
        <value name="ACK_OUT_STATUS_IN" value="1011" desc="SETUP: Accept, IN: Respond with 0B data, OUT:  Accept data." />
        <value name="NAK_IN" value="1100" desc="SETUP: Ignore, IN: NAK, OUT: Ignore." />
        <value name="ACK_IN" value="1101" desc="SETUP: Ignore, IN: Respond to IN with data if STALL=0, STALL otherwise, OUT: Ignore" />
        <value name="ACK_IN STATUS OUT" value="1111" desc="SETUP: Accept, IN: Respond to IN with data, OUT: ACK 0B tokens, NAK others." />
      </field>
      <field name="ACKED_TXN" from="4" to="4" access="RW" resetVal="" desc="ACKED_NO - 0, ACKED_YES - 1." hidden="false" />
      <field name="NAK_INT_EN" from="5" to="5" access="RW" resetVal="" desc="When set this bit causes an endpoint interrupt to be generated even when a transfer completes with a NAK." hidden="false" />
      <field name="ERR_IN_TXN" from="6" to="6" access="RW" resetVal="" desc="The Error in transaction bit is set whenever an error is detected." hidden="false" />
      <field name="STALL" from="7" to="7" access="RW" resetVal="" desc="When this bit is set the SIE stalls an OUT packet if the Mode bits are set to ACK-OUT. The SIE stalls an IN packet if the mode bits are set to ACK-IN. This bit must be clear for all other modes." hidden="false" />
    </register>
    <register name="EP0_CR" address="0x40006028" bitWidth="8" desc="Endpoint0 control Register" hidden="false">
      <field name="MODE" from="3" to="0" access="RW" resetVal="" desc="The mode controls how the USB SIE responds to traffic and how the USB SIE changes the mode of that endpoint as a result of host packets to the endpoint." hidden="false">
        <value name="DISABLE" value="0000" desc="Ignore all USB traffic to this endpoint." />
        <value name="NAK_INOUT" value="0001" desc="SETUP: Accept, IN: NAK, OUT: NAK." />
        <value name="STATUS_OUT_ONLY" value="0010" desc="SETUP: Accept, IN: STALL, OUT: ACK 0B tokens, NAK others." />
        <value name="STALL_INOUT" value="0011" desc="SETUP: Accept, IN: STALL, OUT: STALL." />
        <value name="ISO_OUT" value="0101" desc="SETUP: Ignore, IN: Ignore, OUT: Accept Isochronous OUT token." />
        <value name="STATUS_IN_ONLY" value="0110" desc="SETUP: Accept, IN: Respond with 0B data, OUT:  Stall." />
        <value name="ISO_IN" value="0111" desc="SETUP: Ignore, IN: Accept Isochronous IN token, OUT: Ignore." />
        <value name="NAK_OUT" value="1000" desc="SETUP: Ignore, IN: Ignore, OUT: NAK." />
        <value name="ACK_OUT" value="1001" desc="SETUP: Ignore, IN: Ignore, OUT: Accept data and ACK if STALL = 0, STALL otherwise. Change to MODE=8 after one succesfull OUT token." />
        <value name="ACK_OUT_STATUS_IN" value="1011" desc="SETUP: Accept, IN: Respond with 0B data, OUT:  Accept data." />
        <value name="NAK_IN" value="1100" desc="SETUP: Ignore, IN: NAK, OUT: Ignore." />
        <value name="ACK_IN" value="1101" desc="SETUP: Ignore, IN: Respond to IN with data if STALL=0, STALL otherwise, OUT: Ignore" />
        <value name="ACK_IN STATUS OUT" value="1111" desc="SETUP: Accept, IN: Respond to IN with data, OUT: ACK 0B tokens, NAK others." />
      </field>
      <field name="ACKED_TXN" from="4" to="4" access="RW" resetVal="" desc="ACKED_NO - 0, ACKED_YES - 1." hidden="false" />
      <field name="NAK_INT_EN" from="5" to="5" access="RW" resetVal="" desc="When set this bit causes an endpoint interrupt to be generated even when a transfer completes with a NAK." hidden="false" />
      <field name="ERR_IN_TXN" from="6" to="6" access="RW" resetVal="" desc="The Error in transaction bit is set whenever an error is detected." hidden="false" />
      <field name="STALL" from="7" to="7" access="RW" resetVal="" desc="When this bit is set the SIE stalls an OUT packet if the Mode bits are set to ACK-OUT. The SIE stalls an IN packet if the mode bits are set to ACK-IN. This bit must be clear for all other modes." hidden="false" />
    </register>
    <register name="EP0_CNT" address="0x40006029" bitWidth="8" desc="Endpoint0 control Register" hidden="false">
      <field name="BYTE_COUNT" from="3" to="0" access="RW" resetVal="" desc="These bits indicate the number of data bytes in a transaction. For IN transactions firmware loads the count with the number of bytes to be transmitted to the host from the endpoint FIFO. Valid values are 0 to 8. For OUT or SETUP transactions the count is updated by hardware to the number of data bytes received plus two for the CRC bytes. Valid values are 2 to 10." hidden="false" />
      <field name="DATA_VALID" from="4" to="4" access="RW" resetVal="" desc="This bit is used for OUT/SETUP transactions only and is read only. It is cleared to '0' if CRC bit stuffing errors or PID errors occur. This bit does not update for some endpoint mode settings." hidden="false">
        <value name="DATA_ERROR" value="0" desc="No ACK'd transactions since bit was last cleared." />
        <value name="DATA_VALID" value="1" desc="Indicates a transaction ended with an ACK." />
      </field>
      <field name="DATA_TOGGLE" from="5" to="5" access="RW" resetVal="" desc="This bit selects the DATA packet's toggle state. For IN transactions firmware must set this bit to the expected state. For OUT transactions the hardware sets this bit to the state of the received Data Toggle bit." hidden="false" />
    </register>
    <register name="SIE_EP3_CNT0" address="0x4000602C" bitWidth="8" desc="SIE Endpoint 1 Count0 Register" hidden="false">
      <field name="DATA_COUNT_MSB" from="2" to="0" access="RW" resetVal="" desc="These bits are the 3 MSb bits of an 11-bit counter. The LSb are the Data Count[7:0] bits of the CNT1 register. Refer to the CNT1 register for more information." hidden="false" />
      <field name="DATA_VALID" from="4" to="4" access="RW" resetVal="" desc="DATA_ERROR - 0, DATA_VALID - 1." hidden="false" />
      <field name="DATA_TOGGLE" from="7" to="7" access="RW" resetVal="" desc="This bit selects the DATA packet's toggle state. For IN transactions firmware must set this bit to the expected state. For OUT transactions the hardware sets this bit to the state of the received Data Toggle bit." hidden="false" />
    </register>
    <register name="SIE_EP3_CNT1" address="0x4000602D" bitWidth="8" desc="SIE Endpoint 1 Count1 Register" hidden="false">
      <field name="DATA_COUNT" from="7" to="0" access="RW" resetVal="" desc="These bits are the 8 LSb of a 11-bit counter.  The 3 MSb bits are in the CNT0 register. The 11-bit count indicates the number of data bytes in a transaction." hidden="false" />
    </register>
    <register name="SIE_EP3_CR0" address="0x4000602E" bitWidth="8" desc="SIE Endpoint 1 Control Register" hidden="false">
      <field name="MODE" from="3" to="0" access="RW" resetVal="" desc="The mode controls how the USB SIE responds to traffic and how the USB SIE changes the mode of that endpoint as a result of host packets to the endpoint." hidden="false">
        <value name="DISABLE" value="0000" desc="Ignore all USB traffic to this endpoint." />
        <value name="NAK_INOUT" value="0001" desc="SETUP: Accept, IN: NAK, OUT: NAK." />
        <value name="STATUS_OUT_ONLY" value="0010" desc="SETUP: Accept, IN: STALL, OUT: ACK 0B tokens, NAK others." />
        <value name="STALL_INOUT" value="0011" desc="SETUP: Accept, IN: STALL, OUT: STALL." />
        <value name="ISO_OUT" value="0101" desc="SETUP: Ignore, IN: Ignore, OUT: Accept Isochronous OUT token." />
        <value name="STATUS_IN_ONLY" value="0110" desc="SETUP: Accept, IN: Respond with 0B data, OUT:  Stall." />
        <value name="ISO_IN" value="0111" desc="SETUP: Ignore, IN: Accept Isochronous IN token, OUT: Ignore." />
        <value name="NAK_OUT" value="1000" desc="SETUP: Ignore, IN: Ignore, OUT: NAK." />
        <value name="ACK_OUT" value="1001" desc="SETUP: Ignore, IN: Ignore, OUT: Accept data and ACK if STALL = 0, STALL otherwise. Change to MODE=8 after one succesfull OUT token." />
        <value name="ACK_OUT_STATUS_IN" value="1011" desc="SETUP: Accept, IN: Respond with 0B data, OUT:  Accept data." />
        <value name="NAK_IN" value="1100" desc="SETUP: Ignore, IN: NAK, OUT: Ignore." />
        <value name="ACK_IN" value="1101" desc="SETUP: Ignore, IN: Respond to IN with data if STALL=0, STALL otherwise, OUT: Ignore" />
        <value name="ACK_IN STATUS OUT" value="1111" desc="SETUP: Accept, IN: Respond to IN with data, OUT: ACK 0B tokens, NAK others." />
      </field>
      <field name="ACKED_TXN" from="4" to="4" access="RW" resetVal="" desc="ACKED_NO - 0, ACKED_YES - 1." hidden="false" />
      <field name="NAK_INT_EN" from="5" to="5" access="RW" resetVal="" desc="When set this bit causes an endpoint interrupt to be generated even when a transfer completes with a NAK." hidden="false" />
      <field name="ERR_IN_TXN" from="6" to="6" access="RW" resetVal="" desc="The Error in transaction bit is set whenever an error is detected." hidden="false" />
      <field name="STALL" from="7" to="7" access="RW" resetVal="" desc="When this bit is set the SIE stalls an OUT packet if the Mode bits are set to ACK-OUT. The SIE stalls an IN packet if the mode bits are set to ACK-IN. This bit must be clear for all other modes." hidden="false" />
    </register>
    <register name="SIE_EP4_CNT0" address="0x4000603C" bitWidth="8" desc="SIE Endpoint 1 Count0 Register" hidden="true">
      <field name="DATA_COUNT_MSB" from="2" to="0" access="RW" resetVal="" desc="These bits are the 3 MSb bits of an 11-bit counter. The LSb are the Data Count[7:0] bits of the CNT1 register. Refer to the CNT1 register for more information." hidden="false" />
      <field name="DATA_VALID" from="4" to="4" access="RW" resetVal="" desc="DATA_ERROR - 0, DATA_VALID - 1." hidden="false" />
      <field name="DATA_TOGGLE" from="7" to="7" access="RW" resetVal="" desc="This bit selects the DATA packet's toggle state. For IN transactions firmware must set this bit to the expected state. For OUT transactions the hardware sets this bit to the state of the received Data Toggle bit." hidden="false" />
    </register>
    <register name="SIE_EP4_CNT1" address="0x4000603D" bitWidth="8" desc="SIE Endpoint 1 Count1 Register" hidden="true">
      <field name="DATA_COUNT" from="7" to="0" access="RW" resetVal="" desc="These bits are the 8 LSb of a 11-bit counter.  The 3 MSb bits are in the CNT0 register. The 11-bit count indicates the number of data bytes in a transaction." hidden="false" />
    </register>
    <register name="SIE_EP4_CR0" address="0x4000603E" bitWidth="8" desc="SIE Endpoint 1 Control Register" hidden="true">
      <field name="MODE" from="3" to="0" access="RW" resetVal="" desc="The mode controls how the USB SIE responds to traffic and how the USB SIE changes the mode of that endpoint as a result of host packets to the endpoint." hidden="false">
        <value name="DISABLE" value="0000" desc="Ignore all USB traffic to this endpoint." />
        <value name="NAK_INOUT" value="0001" desc="SETUP: Accept, IN: NAK, OUT: NAK." />
        <value name="STATUS_OUT_ONLY" value="0010" desc="SETUP: Accept, IN: STALL, OUT: ACK 0B tokens, NAK others." />
        <value name="STALL_INOUT" value="0011" desc="SETUP: Accept, IN: STALL, OUT: STALL." />
        <value name="ISO_OUT" value="0101" desc="SETUP: Ignore, IN: Ignore, OUT: Accept Isochronous OUT token." />
        <value name="STATUS_IN_ONLY" value="0110" desc="SETUP: Accept, IN: Respond with 0B data, OUT:  Stall." />
        <value name="ISO_IN" value="0111" desc="SETUP: Ignore, IN: Accept Isochronous IN token, OUT: Ignore." />
        <value name="NAK_OUT" value="1000" desc="SETUP: Ignore, IN: Ignore, OUT: NAK." />
        <value name="ACK_OUT" value="1001" desc="SETUP: Ignore, IN: Ignore, OUT: Accept data and ACK if STALL = 0, STALL otherwise. Change to MODE=8 after one succesfull OUT token." />
        <value name="ACK_OUT_STATUS_IN" value="1011" desc="SETUP: Accept, IN: Respond with 0B data, OUT:  Accept data." />
        <value name="NAK_IN" value="1100" desc="SETUP: Ignore, IN: NAK, OUT: Ignore." />
        <value name="ACK_IN" value="1101" desc="SETUP: Ignore, IN: Respond to IN with data if STALL=0, STALL otherwise, OUT: Ignore" />
        <value name="ACK_IN STATUS OUT" value="1111" desc="SETUP: Accept, IN: Respond to IN with data, OUT: ACK 0B tokens, NAK others." />
      </field>
      <field name="ACKED_TXN" from="4" to="4" access="RW" resetVal="" desc="ACKED_NO - 0, ACKED_YES - 1." hidden="false" />
      <field name="NAK_INT_EN" from="5" to="5" access="RW" resetVal="" desc="When set this bit causes an endpoint interrupt to be generated even when a transfer completes with a NAK." hidden="false" />
      <field name="ERR_IN_TXN" from="6" to="6" access="RW" resetVal="" desc="The Error in transaction bit is set whenever an error is detected." hidden="false" />
      <field name="STALL" from="7" to="7" access="RW" resetVal="" desc="When this bit is set the SIE stalls an OUT packet if the Mode bits are set to ACK-OUT. The SIE stalls an IN packet if the mode bits are set to ACK-IN. This bit must be clear for all other modes." hidden="false" />
    </register>
    <register name="SIE_EP5_CNT0" address="0x4000604C" bitWidth="8" desc="SIE Endpoint 1 Count0 Register" hidden="true">
      <field name="DATA_COUNT_MSB" from="2" to="0" access="RW" resetVal="" desc="These bits are the 3 MSb bits of an 11-bit counter. The LSb are the Data Count[7:0] bits of the CNT1 register. Refer to the CNT1 register for more information." hidden="false" />
      <field name="DATA_VALID" from="4" to="4" access="RW" resetVal="" desc="DATA_ERROR - 0, DATA_VALID - 1." hidden="false" />
      <field name="DATA_TOGGLE" from="7" to="7" access="RW" resetVal="" desc="This bit selects the DATA packet's toggle state. For IN transactions firmware must set this bit to the expected state. For OUT transactions the hardware sets this bit to the state of the received Data Toggle bit." hidden="false" />
    </register>
    <register name="SIE_EP5_CNT1" address="0x4000604D" bitWidth="8" desc="SIE Endpoint 1 Count1 Register" hidden="true">
      <field name="DATA_COUNT" from="7" to="0" access="RW" resetVal="" desc="These bits are the 8 LSb of a 11-bit counter.  The 3 MSb bits are in the CNT0 register. The 11-bit count indicates the number of data bytes in a transaction." hidden="false" />
    </register>
    <register name="SIE_EP5_CR0" address="0x4000604E" bitWidth="8" desc="SIE Endpoint 1 Control Register" hidden="true">
      <field name="MODE" from="3" to="0" access="RW" resetVal="" desc="The mode controls how the USB SIE responds to traffic and how the USB SIE changes the mode of that endpoint as a result of host packets to the endpoint." hidden="false">
        <value name="DISABLE" value="0000" desc="Ignore all USB traffic to this endpoint." />
        <value name="NAK_INOUT" value="0001" desc="SETUP: Accept, IN: NAK, OUT: NAK." />
        <value name="STATUS_OUT_ONLY" value="0010" desc="SETUP: Accept, IN: STALL, OUT: ACK 0B tokens, NAK others." />
        <value name="STALL_INOUT" value="0011" desc="SETUP: Accept, IN: STALL, OUT: STALL." />
        <value name="ISO_OUT" value="0101" desc="SETUP: Ignore, IN: Ignore, OUT: Accept Isochronous OUT token." />
        <value name="STATUS_IN_ONLY" value="0110" desc="SETUP: Accept, IN: Respond with 0B data, OUT:  Stall." />
        <value name="ISO_IN" value="0111" desc="SETUP: Ignore, IN: Accept Isochronous IN token, OUT: Ignore." />
        <value name="NAK_OUT" value="1000" desc="SETUP: Ignore, IN: Ignore, OUT: NAK." />
        <value name="ACK_OUT" value="1001" desc="SETUP: Ignore, IN: Ignore, OUT: Accept data and ACK if STALL = 0, STALL otherwise. Change to MODE=8 after one succesfull OUT token." />
        <value name="ACK_OUT_STATUS_IN" value="1011" desc="SETUP: Accept, IN: Respond with 0B data, OUT:  Accept data." />
        <value name="NAK_IN" value="1100" desc="SETUP: Ignore, IN: NAK, OUT: Ignore." />
        <value name="ACK_IN" value="1101" desc="SETUP: Ignore, IN: Respond to IN with data if STALL=0, STALL otherwise, OUT: Ignore" />
        <value name="ACK_IN STATUS OUT" value="1111" desc="SETUP: Accept, IN: Respond to IN with data, OUT: ACK 0B tokens, NAK others." />
      </field>
      <field name="ACKED_TXN" from="4" to="4" access="RW" resetVal="" desc="ACKED_NO - 0, ACKED_YES - 1." hidden="false" />
      <field name="NAK_INT_EN" from="5" to="5" access="RW" resetVal="" desc="When set this bit causes an endpoint interrupt to be generated even when a transfer completes with a NAK." hidden="false" />
      <field name="ERR_IN_TXN" from="6" to="6" access="RW" resetVal="" desc="The Error in transaction bit is set whenever an error is detected." hidden="false" />
      <field name="STALL" from="7" to="7" access="RW" resetVal="" desc="When this bit is set the SIE stalls an OUT packet if the Mode bits are set to ACK-OUT. The SIE stalls an IN packet if the mode bits are set to ACK-IN. This bit must be clear for all other modes." hidden="false" />
    </register>
    <register name="SIE_EP6_CNT0" address="0x4000605C" bitWidth="8" desc="SIE Endpoint 1 Count0 Register" hidden="true">
      <field name="DATA_COUNT_MSB" from="2" to="0" access="RW" resetVal="" desc="These bits are the 3 MSb bits of an 11-bit counter. The LSb are the Data Count[7:0] bits of the CNT1 register. Refer to the CNT1 register for more information." hidden="false" />
      <field name="DATA_VALID" from="4" to="4" access="RW" resetVal="" desc="DATA_ERROR - 0, DATA_VALID - 1." hidden="false" />
      <field name="DATA_TOGGLE" from="7" to="7" access="RW" resetVal="" desc="This bit selects the DATA packet's toggle state. For IN transactions firmware must set this bit to the expected state. For OUT transactions the hardware sets this bit to the state of the received Data Toggle bit." hidden="false" />
    </register>
    <register name="SIE_EP6_CNT1" address="0x4000605D" bitWidth="8" desc="SIE Endpoint 1 Count1 Register" hidden="true">
      <field name="DATA_COUNT" from="7" to="0" access="RW" resetVal="" desc="These bits are the 8 LSb of a 11-bit counter.  The 3 MSb bits are in the CNT0 register. The 11-bit count indicates the number of data bytes in a transaction." hidden="false" />
    </register>
    <register name="SIE_EP6_CR0" address="0x4000605E" bitWidth="8" desc="SIE Endpoint 1 Control Register" hidden="true">
      <field name="MODE" from="3" to="0" access="RW" resetVal="" desc="The mode controls how the USB SIE responds to traffic and how the USB SIE changes the mode of that endpoint as a result of host packets to the endpoint." hidden="false">
        <value name="DISABLE" value="0000" desc="Ignore all USB traffic to this endpoint." />
        <value name="NAK_INOUT" value="0001" desc="SETUP: Accept, IN: NAK, OUT: NAK." />
        <value name="STATUS_OUT_ONLY" value="0010" desc="SETUP: Accept, IN: STALL, OUT: ACK 0B tokens, NAK others." />
        <value name="STALL_INOUT" value="0011" desc="SETUP: Accept, IN: STALL, OUT: STALL." />
        <value name="ISO_OUT" value="0101" desc="SETUP: Ignore, IN: Ignore, OUT: Accept Isochronous OUT token." />
        <value name="STATUS_IN_ONLY" value="0110" desc="SETUP: Accept, IN: Respond with 0B data, OUT:  Stall." />
        <value name="ISO_IN" value="0111" desc="SETUP: Ignore, IN: Accept Isochronous IN token, OUT: Ignore." />
        <value name="NAK_OUT" value="1000" desc="SETUP: Ignore, IN: Ignore, OUT: NAK." />
        <value name="ACK_OUT" value="1001" desc="SETUP: Ignore, IN: Ignore, OUT: Accept data and ACK if STALL = 0, STALL otherwise. Change to MODE=8 after one succesfull OUT token." />
        <value name="ACK_OUT_STATUS_IN" value="1011" desc="SETUP: Accept, IN: Respond with 0B data, OUT:  Accept data." />
        <value name="NAK_IN" value="1100" desc="SETUP: Ignore, IN: NAK, OUT: Ignore." />
        <value name="ACK_IN" value="1101" desc="SETUP: Ignore, IN: Respond to IN with data if STALL=0, STALL otherwise, OUT: Ignore" />
        <value name="ACK_IN STATUS OUT" value="1111" desc="SETUP: Accept, IN: Respond to IN with data, OUT: ACK 0B tokens, NAK others." />
      </field>
      <field name="ACKED_TXN" from="4" to="4" access="RW" resetVal="" desc="ACKED_NO - 0, ACKED_YES - 1." hidden="false" />
      <field name="NAK_INT_EN" from="5" to="5" access="RW" resetVal="" desc="When set this bit causes an endpoint interrupt to be generated even when a transfer completes with a NAK." hidden="false" />
      <field name="ERR_IN_TXN" from="6" to="6" access="RW" resetVal="" desc="The Error in transaction bit is set whenever an error is detected." hidden="false" />
      <field name="STALL" from="7" to="7" access="RW" resetVal="" desc="When this bit is set the SIE stalls an OUT packet if the Mode bits are set to ACK-OUT. The SIE stalls an IN packet if the mode bits are set to ACK-IN. This bit must be clear for all other modes." hidden="false" />
    </register>
    <register name="SIE_EP7_CNT0" address="0x4000606C" bitWidth="8" desc="SIE Endpoint 1 Count0 Register" hidden="true">
      <field name="DATA_COUNT_MSB" from="2" to="0" access="RW" resetVal="" desc="These bits are the 3 MSb bits of an 11-bit counter. The LSb are the Data Count[7:0] bits of the CNT1 register. Refer to the CNT1 register for more information." hidden="false" />
      <field name="DATA_VALID" from="4" to="4" access="RW" resetVal="" desc="DATA_ERROR - 0, DATA_VALID - 1." hidden="false" />
      <field name="DATA_TOGGLE" from="7" to="7" access="RW" resetVal="" desc="This bit selects the DATA packet's toggle state. For IN transactions firmware must set this bit to the expected state. For OUT transactions the hardware sets this bit to the state of the received Data Toggle bit." hidden="false" />
    </register>
    <register name="SIE_EP7_CNT1" address="0x4000606D" bitWidth="8" desc="SIE Endpoint 1 Count1 Register" hidden="true">
      <field name="DATA_COUNT" from="7" to="0" access="RW" resetVal="" desc="These bits are the 8 LSb of a 11-bit counter.  The 3 MSb bits are in the CNT0 register. The 11-bit count indicates the number of data bytes in a transaction." hidden="false" />
    </register>
    <register name="SIE_EP7_CR0" address="0x4000606E" bitWidth="8" desc="SIE Endpoint 1 Control Register" hidden="true">
      <field name="MODE" from="3" to="0" access="RW" resetVal="" desc="The mode controls how the USB SIE responds to traffic and how the USB SIE changes the mode of that endpoint as a result of host packets to the endpoint." hidden="false">
        <value name="DISABLE" value="0000" desc="Ignore all USB traffic to this endpoint." />
        <value name="NAK_INOUT" value="0001" desc="SETUP: Accept, IN: NAK, OUT: NAK." />
        <value name="STATUS_OUT_ONLY" value="0010" desc="SETUP: Accept, IN: STALL, OUT: ACK 0B tokens, NAK others." />
        <value name="STALL_INOUT" value="0011" desc="SETUP: Accept, IN: STALL, OUT: STALL." />
        <value name="ISO_OUT" value="0101" desc="SETUP: Ignore, IN: Ignore, OUT: Accept Isochronous OUT token." />
        <value name="STATUS_IN_ONLY" value="0110" desc="SETUP: Accept, IN: Respond with 0B data, OUT:  Stall." />
        <value name="ISO_IN" value="0111" desc="SETUP: Ignore, IN: Accept Isochronous IN token, OUT: Ignore." />
        <value name="NAK_OUT" value="1000" desc="SETUP: Ignore, IN: Ignore, OUT: NAK." />
        <value name="ACK_OUT" value="1001" desc="SETUP: Ignore, IN: Ignore, OUT: Accept data and ACK if STALL = 0, STALL otherwise. Change to MODE=8 after one succesfull OUT token." />
        <value name="ACK_OUT_STATUS_IN" value="1011" desc="SETUP: Accept, IN: Respond with 0B data, OUT:  Accept data." />
        <value name="NAK_IN" value="1100" desc="SETUP: Ignore, IN: NAK, OUT: Ignore." />
        <value name="ACK_IN" value="1101" desc="SETUP: Ignore, IN: Respond to IN with data if STALL=0, STALL otherwise, OUT: Ignore" />
        <value name="ACK_IN STATUS OUT" value="1111" desc="SETUP: Accept, IN: Respond to IN with data, OUT: ACK 0B tokens, NAK others." />
      </field>
      <field name="ACKED_TXN" from="4" to="4" access="RW" resetVal="" desc="ACKED_NO - 0, ACKED_YES - 1." hidden="false" />
      <field name="NAK_INT_EN" from="5" to="5" access="RW" resetVal="" desc="When set this bit causes an endpoint interrupt to be generated even when a transfer completes with a NAK." hidden="false" />
      <field name="ERR_IN_TXN" from="6" to="6" access="RW" resetVal="" desc="The Error in transaction bit is set whenever an error is detected." hidden="false" />
      <field name="STALL" from="7" to="7" access="RW" resetVal="" desc="When this bit is set the SIE stalls an OUT packet if the Mode bits are set to ACK-OUT. The SIE stalls an IN packet if the mode bits are set to ACK-IN. This bit must be clear for all other modes." hidden="false" />
    </register>
    <register name="SIE_EP8_CNT0" address="0x4000607C" bitWidth="8" desc="SIE Endpoint 1 Count0 Register" hidden="true">
      <field name="DATA_COUNT_MSB" from="2" to="0" access="RW" resetVal="" desc="These bits are the 3 MSb bits of an 11-bit counter. The LSb are the Data Count[7:0] bits of the CNT1 register. Refer to the CNT1 register for more information." hidden="false" />
      <field name="DATA_VALID" from="4" to="4" access="RW" resetVal="" desc="DATA_ERROR - 0, DATA_VALID - 1." hidden="false" />
      <field name="DATA_TOGGLE" from="7" to="7" access="RW" resetVal="" desc="This bit selects the DATA packet's toggle state. For IN transactions firmware must set this bit to the expected state. For OUT transactions the hardware sets this bit to the state of the received Data Toggle bit." hidden="false" />
    </register>
    <register name="SIE_EP8_CNT1" address="0x4000607D" bitWidth="8" desc="SIE Endpoint 1 Count1 Register" hidden="true">
      <field name="DATA_COUNT" from="7" to="0" access="RW" resetVal="" desc="These bits are the 8 LSb of a 11-bit counter.  The 3 MSb bits are in the CNT0 register. The 11-bit count indicates the number of data bytes in a transaction." hidden="false" />
    </register>
    <register name="SIE_EP8_CR0" address="0x4000607E" bitWidth="8" desc="SIE Endpoint 1 Control Register" hidden="true">
      <field name="MODE" from="3" to="0" access="RW" resetVal="" desc="The mode controls how the USB SIE responds to traffic and how the USB SIE changes the mode of that endpoint as a result of host packets to the endpoint." hidden="false">
        <value name="DISABLE" value="0000" desc="Ignore all USB traffic to this endpoint." />
        <value name="NAK_INOUT" value="0001" desc="SETUP: Accept, IN: NAK, OUT: NAK." />
        <value name="STATUS_OUT_ONLY" value="0010" desc="SETUP: Accept, IN: STALL, OUT: ACK 0B tokens, NAK others." />
        <value name="STALL_INOUT" value="0011" desc="SETUP: Accept, IN: STALL, OUT: STALL." />
        <value name="ISO_OUT" value="0101" desc="SETUP: Ignore, IN: Ignore, OUT: Accept Isochronous OUT token." />
        <value name="STATUS_IN_ONLY" value="0110" desc="SETUP: Accept, IN: Respond with 0B data, OUT:  Stall." />
        <value name="ISO_IN" value="0111" desc="SETUP: Ignore, IN: Accept Isochronous IN token, OUT: Ignore." />
        <value name="NAK_OUT" value="1000" desc="SETUP: Ignore, IN: Ignore, OUT: NAK." />
        <value name="ACK_OUT" value="1001" desc="SETUP: Ignore, IN: Ignore, OUT: Accept data and ACK if STALL = 0, STALL otherwise. Change to MODE=8 after one succesfull OUT token." />
        <value name="ACK_OUT_STATUS_IN" value="1011" desc="SETUP: Accept, IN: Respond with 0B data, OUT:  Accept data." />
        <value name="NAK_IN" value="1100" desc="SETUP: Ignore, IN: NAK, OUT: Ignore." />
        <value name="ACK_IN" value="1101" desc="SETUP: Ignore, IN: Respond to IN with data if STALL=0, STALL otherwise, OUT: Ignore" />
        <value name="ACK_IN STATUS OUT" value="1111" desc="SETUP: Accept, IN: Respond to IN with data, OUT: ACK 0B tokens, NAK others." />
      </field>
      <field name="ACKED_TXN" from="4" to="4" access="RW" resetVal="" desc="ACKED_NO - 0, ACKED_YES - 1." hidden="false" />
      <field name="NAK_INT_EN" from="5" to="5" access="RW" resetVal="" desc="When set this bit causes an endpoint interrupt to be generated even when a transfer completes with a NAK." hidden="false" />
      <field name="ERR_IN_TXN" from="6" to="6" access="RW" resetVal="" desc="The Error in transaction bit is set whenever an error is detected." hidden="false" />
      <field name="STALL" from="7" to="7" access="RW" resetVal="" desc="When this bit is set the SIE stalls an OUT packet if the Mode bits are set to ACK-OUT. The SIE stalls an IN packet if the mode bits are set to ACK-IN. This bit must be clear for all other modes." hidden="false" />
    </register>
    <register name="ARB_EP1_CFG" address="0x40006080" bitWidth="8" desc="Arbiter Endpoint 1 Configuration Register" hidden="false">
      <field name="IN_DATA_RDY" from="0" to="0" access="RW" resetVal="" desc="Indication that Endpoint Packet Data is Ready in Main memory" hidden="false" />
      <field name="DMA_REQ" from="1" to="1" access="RW" resetVal="" desc="Manual DMA Request for a particular (1 to 8) endpoint; changing this field from 0 to 1 causes a DMA request to be generated." hidden="false" />
      <field name="CRC_BYPASS" from="2" to="2" access="RW" resetVal="" desc="CRC_NORMAL - 0, CRC_BYPASS - 1" hidden="false" />
      <field name="RESET_PTR" from="3" to="3" access="RW" resetVal="" desc="RESET_KRYPTON - 0, RESET_NORMAL - 1" hidden="false" />
    </register>
    <register name="ARB_EP1_INT_EN" address="0x40006081" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Enable Register" hidden="false">
      <field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
      <field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
      <field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
      <field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
      <field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
      <field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
    </register>
    <register name="ARB_EP1_INT_SR" address="0x40006082" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Status Register" hidden="false">
      <field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
      <field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
      <field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
      <field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
      <field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
      <field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
    </register>
    <register name="ARB_RW1_WA" address="0x40006084" bitWidth="8" desc="Arbiter Endpoint 1 Write Address LSB Register" hidden="false">
      <field name="WA8" from="7" to="0" access="RW" resetVal="" desc="Write Address for EP." hidden="false" />
    </register>
    <register name="ARB_RW1_WA_MSB" address="0x40006085" bitWidth="8" desc="Arbiter Endpoint 1 Write Address MSB Register" hidden="false">
      <field name="WA9" from="0" to="0" access="RW" resetVal="" desc="Write Address for EP MSB." hidden="false" />
    </register>
    <register name="ARB_RW1_RA" address="0x40006086" bitWidth="8" desc="Arbiter Endpoint 1 Read Address LSB Register" hidden="false">
      <field name="RA8" from="7" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
    </register>
    <register name="ARB_RW1_RA_MSB" address="0x40006087" bitWidth="8" desc="Arbiter Endpoint 1 Read Address MSB Register" hidden="false">
      <field name="RA9" from="0" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
    </register>
    <register name="BUF_SIZE" address="0x4000608C" bitWidth="8" desc="Dedicated Endpoint Buffer Size Register" hidden="true">
      <field name="IN_BUF" from="3" to="0" access="RW" resetVal="" desc="Buffer size for IN Endpoints:  1 - 2 bytes, 2 - 4 bytes; 9 - 512 bytes." hidden="false" />
      <field name="OUT_BUF" from="7" to="4" access="RW" resetVal="" desc="Buffer size for OUT Endpoints: 1 - 2 bytes, 2 - 4 bytes; 9 - 512 bytes." hidden="false" />
    </register>
    <register name="EP_ACTIVE" address="0x4000608E" bitWidth="8" desc="Endpoint Active Indication Register" hidden="true">
      <field name="EP1_ACT" from="0" to="0" access="R" resetVal="" desc="Indicates that EP1 is currently active" hidden="false" />
      <field name="EP2_ACT" from="1" to="1" access="R" resetVal="" desc="Indicates that EP2 is currently active" hidden="false" />
      <field name="EP3_ACT" from="2" to="2" access="R" resetVal="" desc="Indicates that EP3 is currently active" hidden="false" />
      <field name="EP4_ACT" from="3" to="3" access="R" resetVal="" desc="Indicates that EP4 is currently active" hidden="false" />
      <field name="EP5_ACT" from="4" to="4" access="R" resetVal="" desc="Indicates that EP5 is currently active" hidden="false" />
      <field name="EP6_ACT" from="5" to="5" access="R" resetVal="" desc="Indicates that EP6 is currently active6" hidden="false" />
      <field name="EP7_ACT" from="6" to="6" access="R" resetVal="" desc="Indicates that EP7 is currently active" hidden="false" />
      <field name="EP8_ACT" from="7" to="7" access="R" resetVal="" desc="Indicates that EP8 is currently active" hidden="false" />
    </register>
    <register name="EP_TYPE" address="0x4000608F" bitWidth="8" desc="Endpoint Type (IN/OUT) Indication" hidden="true">
      <field name="EP1_TYP" from="0" to="0" access="RW" resetVal="" desc="Endpoint Type Indication." hidden="false">
        <value name="EP_IN" value="0" desc="IN outpoint." />
        <value name="EP_OUT" value="1" desc="OUT outpoint." />
      </field>
      <field name="EP2_TYP" from="1" to="1" access="RW" resetVal="" desc="Endpoint Type Indication." hidden="false">
        <value name="EP_IN" value="0" desc="IN outpoint." />
        <value name="EP_OUT" value="1" desc="OUT outpoint." />
      </field>
      <field name="EP3_TYP" from="2" to="2" access="RW" resetVal="" desc="Endpoint Type Indication." hidden="false">
        <value name="EP_IN" value="0" desc="IN outpoint." />
        <value name="EP_OUT" value="1" desc="OUT outpoint." />
      </field>
      <field name="EP4_TYP" from="3" to="3" access="RW" resetVal="" desc="Endpoint Type Indication." hidden="false">
        <value name="EP_IN" value="0" desc="IN outpoint." />
        <value name="EP_OUT" value="1" desc="OUT outpoint." />
      </field>
      <field name="EP5_TYP" from="4" to="4" access="RW" resetVal="" desc="Endpoint Type Indication." hidden="false">
        <value name="EP_IN" value="0" desc="IN outpoint." />
        <value name="EP_OUT" value="1" desc="OUT outpoint." />
      </field>
      <field name="EP6_TYP" from="5" to="5" access="RW" resetVal="" desc="Endpoint Type Indication." hidden="false">
        <value name="EP_IN" value="0" desc="IN outpoint." />
        <value name="EP_OUT" value="1" desc="OUT outpoint." />
      </field>
      <field name="EP7_TYP" from="6" to="6" access="RW" resetVal="" desc="Endpoint Type Indication." hidden="false">
        <value name="EP_IN" value="0" desc="IN outpoint." />
        <value name="EP_OUT" value="1" desc="OUT outpoint." />
      </field>
      <field name="EP8_TYP" from="7" to="7" access="RW" resetVal="" desc="Endpoint Type Indication." hidden="false">
        <value name="EP_IN" value="0" desc="IN outpoint." />
        <value name="EP_OUT" value="1" desc="OUT outpoint." />
      </field>
    </register>
    <register name="ARB_EP2_CFG" address="0x40006090" bitWidth="8" desc="Arbiter Endpoint 1 Configuration Register" hidden="false">
      <field name="IN_DATA_RDY" from="0" to="0" access="RW" resetVal="" desc="Indication that Endpoint Packet Data is Ready in Main memory" hidden="false" />
      <field name="DMA_REQ" from="1" to="1" access="RW" resetVal="" desc="Manual DMA Request for a particular (1 to 8) endpoint; changing this field from 0 to 1 causes a DMA request to be generated." hidden="false" />
      <field name="CRC_BYPASS" from="2" to="2" access="RW" resetVal="" desc="CRC_NORMAL - 0, CRC_BYPASS - 1" hidden="false" />
      <field name="RESET_PTR" from="3" to="3" access="RW" resetVal="" desc="RESET_KRYPTON - 0, RESET_NORMAL - 1" hidden="false" />
    </register>
    <register name="ARB_EP2_INT_EN" address="0x40006091" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Enable Register" hidden="false">
      <field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
      <field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
      <field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
      <field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
      <field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
      <field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
    </register>
    <register name="ARB_EP2_INT_SR" address="0x40006092" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Status Register" hidden="false">
      <field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
      <field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
      <field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
      <field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
      <field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
      <field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
    </register>
    <register name="ARB_RW2_WA" address="0x40006094" bitWidth="8" desc="Arbiter Endpoint 1 Write Address LSB Register" hidden="false">
      <field name="WA8" from="7" to="0" access="RW" resetVal="" desc="Write Address for EP." hidden="false" />
    </register>
    <register name="ARB_RW2_WA_MSB" address="0x40006095" bitWidth="8" desc="Arbiter Endpoint 1 Write Address MSB Register" hidden="false">
      <field name="WA9" from="0" to="0" access="RW" resetVal="" desc="Write Address for EP MSB." hidden="false" />
    </register>
    <register name="ARB_RW2_RA" address="0x40006096" bitWidth="8" desc="Arbiter Endpoint 1 Read Address LSB Register" hidden="false">
      <field name="RA8" from="7" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
    </register>
    <register name="ARB_RW2_RA_MSB" address="0x40006097" bitWidth="8" desc="Arbiter Endpoint 1 Read Address MSB Register" hidden="false">
      <field name="RA9" from="0" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
    </register>
    <register name="ARB_CFG" address="0x4000609C" bitWidth="8" desc="Arbiter configuration register" hidden="false">
      <field name="AUTO_MEM" from="4" to="4" access="RW" resetVal="" desc="Enables Auto Memory Configuration.  Manual memory configuration by default." hidden="false" />
      <field name="DMA_CFG" from="6" to="5" access="RW" resetVal="" desc="DMA Access Configuration." hidden="false">
        <value name="DMA_NONE" value="00" desc="No DMA." />
        <value name="DMA_MANUAL" value="01" desc="Manual DMA." />
        <value name="DMA_AUTO" value="10" desc="Auto DMA." />
      </field>
      <field name="CFG_CMP" from="7" to="7" access="RW" resetVal="" desc="Register Configuration Complete Indication. Posedge is detected on this bit. Hence a 0 to 1 transition is required." hidden="false" />
    </register>
    <register name="USB_CLK_EN" address="0x4000609D" bitWidth="8" desc="USB Control 0 Register" hidden="false">
      <field name="CSR_CLK_EN" from="7" to="7" access="RW" resetVal="" desc="Clock Enable for Core Logic clocked by AHB bus clock." hidden="false">
        <value name="Disabled" value="0" desc="Disables clock to UBS block." />
        <value name="Enabled" value="1" desc="Enables clock to UBS block." />
      </field>
    </register>
    <register name="ARB_INT_EN" address="0x4000609E" bitWidth="8" desc="Arbiter Interrupt Enable Register" hidden="false">
      <field name="EP1_INTR_EN" from="0" to="0" access="RW" resetVal="" desc="Enables interrupt for EP1." hidden="false" />
      <field name="EP2_INTR_EN" from="1" to="1" access="RW" resetVal="" desc="Enables interrupt for EP2." hidden="false" />
      <field name="EP3_INTR_EN" from="2" to="2" access="RW" resetVal="" desc="Enables interrupt for EP3." hidden="false" />
      <field name="EP4_INTR_EN" from="3" to="3" access="RW" resetVal="" desc="Enables interrupt for EP4." hidden="false" />
      <field name="EP5_INTR_EN" from="4" to="4" access="RW" resetVal="" desc="Enables interrupt for EP5." hidden="false" />
      <field name="EP6_INTR_EN" from="5" to="5" access="RW" resetVal="" desc="Enables interrupt for EP6." hidden="false" />
      <field name="EP7_INTR_EN" from="6" to="6" access="RW" resetVal="" desc="Enables interrupt for EP7." hidden="false" />
      <field name="EP8_INTR_EN" from="7" to="7" access="RW" resetVal="" desc="Enables interrupt for EP8." hidden="false" />
    </register>
    <register name="ARB_INT_SR" address="0x4000609F" bitWidth="8" desc="Arbiter Interrupt Status" hidden="false">
      <field name="EP1_INTR" from="0" to="0" access="R" resetVal="" desc="Interrupt status for EP1." hidden="false" />
      <field name="EP2_INTR" from="1" to="1" access="R" resetVal="" desc="Interrupt status for EP2." hidden="false" />
      <field name="EP3_INTR" from="2" to="2" access="R" resetVal="" desc="Interrupt status for EP3." hidden="false" />
      <field name="EP4_INTR" from="3" to="3" access="R" resetVal="" desc="Interrupt status for EP4." hidden="false" />
      <field name="EP5_INTR" from="4" to="4" access="R" resetVal="" desc="Interrupt status for EP5." hidden="false" />
      <field name="EP6_INTR" from="5" to="5" access="R" resetVal="" desc="Interrupt status for EP6." hidden="false" />
      <field name="EP7_INTR" from="6" to="6" access="R" resetVal="" desc="Interrupt status for EP7." hidden="false" />
      <field name="EP8_INTR" from="7" to="7" access="R" resetVal="" desc="Interrupt status for EP8." hidden="false" />
    </register>
    <register name="ARB_EP3_CFG" address="0x400060A0" bitWidth="8" desc="Arbiter Endpoint 1 Configuration Register" hidden="false">
      <field name="IN_DATA_RDY" from="0" to="0" access="RW" resetVal="" desc="Indication that Endpoint Packet Data is Ready in Main memory" hidden="false" />
      <field name="DMA_REQ" from="1" to="1" access="RW" resetVal="" desc="Manual DMA Request for a particular (1 to 8) endpoint; changing this field from 0 to 1 causes a DMA request to be generated." hidden="false" />
      <field name="CRC_BYPASS" from="2" to="2" access="RW" resetVal="" desc="CRC_NORMAL - 0, CRC_BYPASS - 1" hidden="false" />
      <field name="RESET_PTR" from="3" to="3" access="RW" resetVal="" desc="RESET_KRYPTON - 0, RESET_NORMAL - 1" hidden="false" />
    </register>
    <register name="ARB_EP3_INT_EN" address="0x400060A1" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Enable Register" hidden="false">
      <field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
      <field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
      <field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
      <field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
      <field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
      <field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
    </register>
    <register name="ARB_EP3_INT_SR" address="0x400060A2" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Status Register" hidden="false">
      <field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
      <field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
      <field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
      <field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
      <field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
      <field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
    </register>
    <register name="ARB_RW3_WA" address="0x400060A4" bitWidth="8" desc="Arbiter Endpoint 1 Write Address LSB Register" hidden="false">
      <field name="WA8" from="7" to="0" access="RW" resetVal="" desc="Write Address for EP." hidden="false" />
    </register>
    <register name="ARB_RW3_WA_MSB" address="0x400060A5" bitWidth="8" desc="Arbiter Endpoint 1 Write Address MSB Register" hidden="false">
      <field name="WA9" from="0" to="0" access="RW" resetVal="" desc="Write Address for EP MSB." hidden="false" />
    </register>
    <register name="ARB_RW3_RA" address="0x400060A6" bitWidth="8" desc="Arbiter Endpoint 1 Read Address LSB Register" hidden="false">
      <field name="RA8" from="7" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
    </register>
    <register name="ARB_RW3_RA_MSB" address="0x400060A7" bitWidth="8" desc="Arbiter Endpoint 1 Read Address MSB Register" hidden="false">
      <field name="RA9" from="0" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
    </register>
    <register name="CWA" address="0x400060AC" bitWidth="8" desc="Common Area Write Address LSB Register" hidden="true">
      <field name="WA8" from="7" to="0" access="RW" resetVal="" desc="Write Address for Common Area." hidden="false" />
    </register>
    <register name="CWA_MSB" address="0x400060AD" bitWidth="8" desc="Common Area Write Address LSB Register" hidden="true">
      <field name="WA9" from="0" to="0" access="RW" resetVal="" desc="Write Address for Common Area MSB." hidden="false" />
    </register>
    <register name="ARB_EP4_CFG" address="0x400060B0" bitWidth="8" desc="Arbiter Endpoint 1 Configuration Register" hidden="true">
      <field name="IN_DATA_RDY" from="0" to="0" access="RW" resetVal="" desc="Indication that Endpoint Packet Data is Ready in Main memory" hidden="false" />
      <field name="DMA_REQ" from="1" to="1" access="RW" resetVal="" desc="Manual DMA Request for a particular (1 to 8) endpoint; changing this field from 0 to 1 causes a DMA request to be generated." hidden="false" />
      <field name="CRC_BYPASS" from="2" to="2" access="RW" resetVal="" desc="CRC_NORMAL - 0, CRC_BYPASS - 1" hidden="false" />
      <field name="RESET_PTR" from="3" to="3" access="RW" resetVal="" desc="RESET_KRYPTON - 0, RESET_NORMAL - 1" hidden="false" />
    </register>
    <register name="ARB_EP4_INT_EN" address="0x400060B1" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Enable Register" hidden="true">
      <field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
      <field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
      <field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
      <field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
      <field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
      <field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
    </register>
    <register name="ARB_EP4_INT_SR" address="0x400060B2" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Status Register" hidden="true">
      <field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
      <field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
      <field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
      <field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
      <field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
      <field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
    </register>
    <register name="ARB_RW4_WA" address="0x400060B4" bitWidth="8" desc="Arbiter Endpoint 1 Write Address LSB Register" hidden="true">
      <field name="WA8" from="7" to="0" access="RW" resetVal="" desc="Write Address for EP." hidden="false" />
    </register>
    <register name="ARB_RW4_WA_MSB" address="0x400060B5" bitWidth="8" desc="Arbiter Endpoint 1 Write Address MSB Register" hidden="true">
      <field name="WA9" from="0" to="0" access="RW" resetVal="" desc="Write Address for EP MSB." hidden="false" />
    </register>
    <register name="ARB_RW4_RA" address="0x400060B6" bitWidth="8" desc="Arbiter Endpoint 1 Read Address LSB Register" hidden="true">
      <field name="RA8" from="7" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
    </register>
    <register name="ARB_RW4_RA_MSB" address="0x400060B7" bitWidth="8" desc="Arbiter Endpoint 1 Read Address MSB Register" hidden="true">
      <field name="RA9" from="0" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
    </register>
    <register name="DMA_THRES" address="0x400060BC" bitWidth="8" desc="DMA Burst / Threshold Configuration LSB Register" hidden="true">
      <field name="WA8" from="7" to="0" access="RW" resetVal="" desc="DMA Threshold count." hidden="false" />
    </register>
    <register name="DMA_THRES_MSB" address="0x400060BD" bitWidth="8" desc="DMA Burst / Threshold Configuration LSB Register" hidden="true">
      <field name="WA9" from="0" to="0" access="RW" resetVal="" desc="DMA Threshold count MSB." hidden="false" />
    </register>
    <register name="ARB_EP5_CFG" address="0x400060C0" bitWidth="8" desc="Arbiter Endpoint 1 Configuration Register" hidden="true">
      <field name="IN_DATA_RDY" from="0" to="0" access="RW" resetVal="" desc="Indication that Endpoint Packet Data is Ready in Main memory" hidden="false" />
      <field name="DMA_REQ" from="1" to="1" access="RW" resetVal="" desc="Manual DMA Request for a particular (1 to 8) endpoint; changing this field from 0 to 1 causes a DMA request to be generated." hidden="false" />
      <field name="CRC_BYPASS" from="2" to="2" access="RW" resetVal="" desc="CRC_NORMAL - 0, CRC_BYPASS - 1" hidden="false" />
      <field name="RESET_PTR" from="3" to="3" access="RW" resetVal="" desc="RESET_KRYPTON - 0, RESET_NORMAL - 1" hidden="false" />
    </register>
    <register name="ARB_EP5_INT_EN" address="0x400060C1" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Enable Register" hidden="true">
      <field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
      <field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
      <field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
      <field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
      <field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
      <field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
    </register>
    <register name="ARB_EP5_INT_SR" address="0x400060C2" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Status Register" hidden="true">
      <field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
      <field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
      <field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
      <field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
      <field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
      <field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
    </register>
    <register name="ARB_RW5_WA" address="0x400060C4" bitWidth="8" desc="Arbiter Endpoint 1 Write Address LSB Register" hidden="true">
      <field name="WA8" from="7" to="0" access="RW" resetVal="" desc="Write Address for EP." hidden="false" />
    </register>
    <register name="ARB_RW5_WA_MSB" address="0x400060C5" bitWidth="8" desc="Arbiter Endpoint 1 Write Address MSB Register" hidden="true">
      <field name="WA9" from="0" to="0" access="RW" resetVal="" desc="Write Address for EP MSB." hidden="false" />
    </register>
    <register name="ARB_RW5_RA" address="0x400060C6" bitWidth="8" desc="Arbiter Endpoint 1 Read Address LSB Register" hidden="true">
      <field name="RA8" from="7" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
    </register>
    <register name="ARB_RW5_RA_MSB" address="0x400060C7" bitWidth="8" desc="Arbiter Endpoint 1 Read Address MSB Register" hidden="true">
      <field name="RA9" from="0" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
    </register>
    <register name="BUS_RST_CNT" address="0x400060CC" bitWidth="8" desc="Bus Reset Count Register" hidden="true">
      <field name="BUS_RST_CNT" from="3" to="0" access="RW" resetVal="" desc="Bus Reset Count Length. Bus Reset Count register ; For USB bus reset length; The value in this register determines the no. of pulses of the low freq. clock which will be counted to determine if an SE0 condition has been held for long enough to declare a USB Bus reset condition. In krypton, 3 pulses of a 32 KHz clock were counted to declare a usb bus reset condition. In leopard, a 100 KHz clock is used. Recommended is to count 10 pulses of this clock to remain equivalent to Krypton." hidden="false" />
    </register>
    <register name="ARB_EP6_CFG" address="0x400060D0" bitWidth="8" desc="Arbiter Endpoint 1 Configuration Register" hidden="true">
      <field name="IN_DATA_RDY" from="0" to="0" access="RW" resetVal="" desc="Indication that Endpoint Packet Data is Ready in Main memory" hidden="false" />
      <field name="DMA_REQ" from="1" to="1" access="RW" resetVal="" desc="Manual DMA Request for a particular (1 to 8) endpoint; changing this field from 0 to 1 causes a DMA request to be generated." hidden="false" />
      <field name="CRC_BYPASS" from="2" to="2" access="RW" resetVal="" desc="CRC_NORMAL - 0, CRC_BYPASS - 1" hidden="false" />
      <field name="RESET_PTR" from="3" to="3" access="RW" resetVal="" desc="RESET_KRYPTON - 0, RESET_NORMAL - 1" hidden="false" />
    </register>
    <register name="ARB_EP6_INT_EN" address="0x400060D1" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Enable Register" hidden="true">
      <field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
      <field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
      <field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
      <field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
      <field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
      <field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
    </register>
    <register name="ARB_EP6_INT_SR" address="0x400060D2" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Status Register" hidden="true">
      <field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
      <field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
      <field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
      <field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
      <field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
      <field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
    </register>
    <register name="ARB_RW6_WA" address="0x400060D4" bitWidth="8" desc="Arbiter Endpoint 1 Write Address LSB Register" hidden="true">
      <field name="WA8" from="7" to="0" access="RW" resetVal="" desc="Write Address for EP." hidden="false" />
    </register>
    <register name="ARB_RW6_WA_MSB" address="0x400060D5" bitWidth="8" desc="Arbiter Endpoint 1 Write Address MSB Register" hidden="true">
      <field name="WA9" from="0" to="0" access="RW" resetVal="" desc="Write Address for EP MSB." hidden="false" />
    </register>
    <register name="ARB_RW6_RA" address="0x400060D6" bitWidth="8" desc="Arbiter Endpoint 1 Read Address LSB Register" hidden="true">
      <field name="RA8" from="7" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
    </register>
    <register name="ARB_RW6_RA_MSB" address="0x400060D7" bitWidth="8" desc="Arbiter Endpoint 1 Read Address MSB Register" hidden="true">
      <field name="RA9" from="0" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
    </register>
    <register name="ARB_EP7_CFG" address="0x400060E0" bitWidth="8" desc="Arbiter Endpoint 1 Configuration Register" hidden="true">
      <field name="IN_DATA_RDY" from="0" to="0" access="RW" resetVal="" desc="Indication that Endpoint Packet Data is Ready in Main memory" hidden="false" />
      <field name="DMA_REQ" from="1" to="1" access="RW" resetVal="" desc="Manual DMA Request for a particular (1 to 8) endpoint; changing this field from 0 to 1 causes a DMA request to be generated." hidden="false" />
      <field name="CRC_BYPASS" from="2" to="2" access="RW" resetVal="" desc="CRC_NORMAL - 0, CRC_BYPASS - 1" hidden="false" />
      <field name="RESET_PTR" from="3" to="3" access="RW" resetVal="" desc="RESET_KRYPTON - 0, RESET_NORMAL - 1" hidden="false" />
    </register>
    <register name="ARB_EP7_INT_EN" address="0x400060E1" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Enable Register" hidden="true">
      <field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
      <field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
      <field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
      <field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
      <field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
      <field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
    </register>
    <register name="ARB_EP7_INT_SR" address="0x400060E2" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Status Register" hidden="true">
      <field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
      <field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
      <field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
      <field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
      <field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
      <field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
    </register>
    <register name="ARB_RW7_WA" address="0x400060E4" bitWidth="8" desc="Arbiter Endpoint 1 Write Address LSB Register" hidden="true">
      <field name="WA8" from="7" to="0" access="RW" resetVal="" desc="Write Address for EP." hidden="false" />
    </register>
    <register name="ARB_RW7_WA_MSB" address="0x400060E5" bitWidth="8" desc="Arbiter Endpoint 1 Write Address MSB Register" hidden="true">
      <field name="WA9" from="0" to="0" access="RW" resetVal="" desc="Write Address for EP MSB." hidden="false" />
    </register>
    <register name="ARB_RW7_RA" address="0x400060E6" bitWidth="8" desc="Arbiter Endpoint 1 Read Address LSB Register" hidden="true">
      <field name="RA8" from="7" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
    </register>
    <register name="ARB_RW7_RA_MSB" address="0x400060E7" bitWidth="8" desc="Arbiter Endpoint 1 Read Address MSB Register" hidden="true">
      <field name="RA9" from="0" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
    </register>
    <register name="ARB_EP8_CFG" address="0x400060F0" bitWidth="8" desc="Arbiter Endpoint 1 Configuration Register" hidden="true">
      <field name="IN_DATA_RDY" from="0" to="0" access="RW" resetVal="" desc="Indication that Endpoint Packet Data is Ready in Main memory" hidden="false" />
      <field name="DMA_REQ" from="1" to="1" access="RW" resetVal="" desc="Manual DMA Request for a particular (1 to 8) endpoint; changing this field from 0 to 1 causes a DMA request to be generated." hidden="false" />
      <field name="CRC_BYPASS" from="2" to="2" access="RW" resetVal="" desc="CRC_NORMAL - 0, CRC_BYPASS - 1" hidden="false" />
      <field name="RESET_PTR" from="3" to="3" access="RW" resetVal="" desc="RESET_KRYPTON - 0, RESET_NORMAL - 1" hidden="false" />
    </register>
    <register name="ARB_EP8_INT_EN" address="0x400060F1" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Enable Register" hidden="true">
      <field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
      <field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
      <field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
      <field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
      <field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
      <field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
    </register>
    <register name="ARB_EP8_INT_SR" address="0x400060F2" bitWidth="8" desc="Arbiter Endpoint 1 Interrupt Status Register" hidden="true">
      <field name="IN_BUF_FULL_EN" from="0" to="0" access="RW" resetVal="" desc="IN Endpoint Local Buffer Full" hidden="false" />
      <field name="DMA_GNT_EN" from="1" to="1" access="RW" resetVal="" desc="Endpoint DMA Grant" hidden="false" />
      <field name="BUF_OVER_EN" from="2" to="2" access="RW" resetVal="" desc="Endpoint Buffer Overflow" hidden="false" />
      <field name="BUF_UNDER_EN" from="3" to="3" access="RW" resetVal="" desc="Endpoint Buffer Underflow" hidden="false" />
      <field name="ERR_INT_EN" from="4" to="4" access="RW" resetVal="" desc="Endpoint Error in Transaction Interrupt" hidden="false" />
      <field name="DMA_TERMIN_EN" from="5" to="5" access="RW" resetVal="" desc="Endpoint DMA Terminated Enable" hidden="false" />
    </register>
    <register name="ARB_RW8_WA" address="0x400060F4" bitWidth="8" desc="Arbiter Endpoint 1 Write Address LSB Register" hidden="true">
      <field name="WA8" from="7" to="0" access="RW" resetVal="" desc="Write Address for EP." hidden="false" />
    </register>
    <register name="ARB_RW8_WA_MSB" address="0x400060F5" bitWidth="8" desc="Arbiter Endpoint 1 Write Address MSB Register" hidden="true">
      <field name="WA9" from="0" to="0" access="RW" resetVal="" desc="Write Address for EP MSB." hidden="false" />
    </register>
    <register name="ARB_RW8_RA" address="0x400060F6" bitWidth="8" desc="Arbiter Endpoint 1 Read Address LSB Register" hidden="true">
      <field name="RA8" from="7" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
    </register>
    <register name="ARB_RW8_RA_MSB" address="0x400060F7" bitWidth="8" desc="Arbiter Endpoint 1 Read Address MSB Register" hidden="true">
      <field name="RA9" from="0" to="0" access="RW" resetVal="" desc="Read Address for EP MSB." hidden="false" />
    </register>
  </block>
  <block name="cy_boot" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
  <block name="Em_EEPROM_Dynamic" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
  <block name="I2C_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false">
    <block name="BusClock" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="or_ff" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="ZeroTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="Vmux_clock" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="Vmux_scl_out" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="OneTerminal_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="OneTerminal_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="or_udb" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="Bufoe_sda" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="Vmux_timeout_clock" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="or_udb_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="Bufoe_scl" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="ZeroTerminal_2" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="Vmux_scl_in" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="Vmux_sda_in" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="ZeroTerminal_3" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="Vmux_sda_out" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="Vmux_interrupt" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="I2C_FF" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <block name="I2C_IRQ" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
    <register name="I2C_1_FF_XCFG" address="0x400049C8" bitWidth="8" desc="I2C Extended Configuration Register" hidden="false">
      <field name="csr_clk_en" from="7" to="7" access="RW" resetVal="" desc="This bit is used for gating system clock for the blocks core logic that is not associated with AHB interface. Clock is made available to the core logic only when this bit is set to 1 and the input pin ext_clk_en is also active. If either of them is not active, the blocks core logic does not receive the system clock." hidden="false" />
      <field name="i2c_on" from="6" to="6" access="RW" resetVal="" desc="This bit should be set by the user during initial block configuration if the user wants to use the I2C block as wake-up source. Only when this bit set along with other bits mentioned in the sleep mode section, the I2C wakes up system from sleep on address match." hidden="false" />
      <field name="ready_to_sleep" from="5" to="5" access="R" resetVal="" desc="Once the user sets the force_nack bit, the I2C block sets this bit if I2C is not busy or it waits for ongoing transaction to be completed and then sets this bit. As long as this bit is set, the I2C block is going to nack all the transactions.Clearing force_nack bit automatically clears this bit. HW clears this bit automatically on assertion of PD (Power Down)" hidden="false" />
      <field name="force_nack" from="4" to="4" access="RW" resetVal="" desc="This bit must be set by the user before putting the device to sleep and wait for ready_to_sleep status bit to be set. This can be cleared by user by writing '0' and the HW clears it automatically on assertion of PD(Power Down)" hidden="false" />
      <field name="hw_addr_en" from="0" to="0" access="RW" resetVal="" desc="When this bit is set to a '1', hardware address compare is enabled. On an address match, an interrupt is generated, CSR register bit 3 is set, and the clock is stalled until the CPU writes a 0 into the CSR register bit 3. The address is automatically ACKed on a match. On an address mismatch,no interrupt is generated, clock is not stalled, and bit 3 in the CSR register is set. The CPU must write a 0 into the CSR register bit 3 to clear it. The address is automatically NACKed on a mismatch. You must configure the compare address in the ADR register. When this bit is set to a '0', software address compare is enabled. An interrupt is generated, the clock is stalled, and CSR register bit 3 is set when the received address byte is available in the Data register; to enable the CPU to do a firmware address compare. The clock is stalled until the CPU writes a 0 into the CSR register bit 3. The functionality of this bit is independent of the data buffering mode." hidden="false" />
    </register>
    <register name="I2C_1_FF_ADDR" address="0x400049CA" bitWidth="8" desc="I2C Slave Adddress Register" hidden="false">
      <field name="slave_address" from="6" to="0" access="RW" resetVal="" desc="These seven bits hold the slave's own device address. These bits are held zero if I2C_CFG.en_mstr and I2C_CFG.en_slave are both zero." hidden="false" />
    </register>
    <register name="I2C_1_FF_CFG" address="0x400049D6" bitWidth="8" desc="I2C Configuration Register" hidden="false">
      <field name="sio_select" from="7" to="7" access="RW" resetVal="" desc="I2C Pin Select for SCL/SDA lines from SIO1/SIO2, 0 = SCL and SDA lines get their inputs from SIO1 module.sclk_str1 and sda_ack1 are driven to SIO1 module and they get asserted once device wakes up from sleep. 1 = SCL and SDA lines get their inputs from SIO2 module. sclk_str2 and sda_ack2 are driven to SIO2 module and they get asserted once device wakes up from sleep. This bit is valid only when I2C.CFG[6] is asserted." hidden="false" />
      <field name="pselect" from="6" to="6" access="RW" resetVal="" desc="I2C Pin Select for SCL/SDA lines from GPIO/SIO, 0 = SCL and SDA lines get their inputs from GPIO module.sclk_str0 and sda_ack0 are driven to GPIO module and they get asserted once device wakes up from sleep. 1 = SCL and SDA lines get their inputs from one of the SIO Blocks that is chosen based on the configuration of bit I2C.CFG[7]" hidden="false" />
      <field name="bus_error_ie" from="5" to="5" access="RW" resetVal="" desc="Bus Error Interrupt Enable 0 disabled 1 enabled. An interrupt is generated on the detection of a Bus error condition." hidden="false" />
      <field name="stop_ie" from="4" to="4" access="RW" resetVal="" desc="Stop Interrupt Enable 0 disabled 1 enabled. An interrupt is generated on the detection of a Stop condition." hidden="false" />
      <field name="clock_rate" from="2" to="2" access="RW" resetVal="" desc="0 Samples/bit is 16, 1 Samples/bit is 32" hidden="false" />
      <field name="en_mstr" from="1" to="1" access="RW" resetVal="" desc="Enables master mode for the device" hidden="false" />
      <field name="en_slave" from="0" to="0" access="RW" resetVal="" desc="Enables Slave mode for the device" hidden="false" />
    </register>
    <register name="I2C_1_FF_CSR" address="0x400049D7" bitWidth="8" desc="I2C Control and Status Register" hidden="false">
      <field name="bus_error" from="7" to="7" access="RW" resetVal="" desc="It must be cleared by firmware by writing a '0' to the bit position. It is never cleared by the hardware. 1 a misplaced Start or Stop condition was detected. This bit is held zero if I2C_CFG.en_mstr and I2C_CFG.en_slave are both zero." hidden="false" />
      <field name="lost_arb" from="6" to="6" access="RW" resetVal="" desc="This bit is set immediately on lost arbitration; however, it does not cause an interrupt. This status may be checked after the following Byte Complete interrupt. Any Start detect or a write to the Start or Restart generate bits (MCSR register), when operating in Master mode, will also clear the bit. 1 lost Arbitration. This bit is held zero if I2C_CFG.en_mstr is zero." hidden="false" />
      <field name="stop_status" from="5" to="5" access="RW" resetVal="" desc="It must be cleared by firmware with write of '0' to the bit position. It is never cleared by the hardware. 1 a Stop condition was detected. This bit is held zero if I2C_CFG.en_mstr and I2C_CFG.en_slave are both zero." hidden="false" />
      <field name="ack" from="4" to="4" access="RW" resetVal="" desc="Acknowledge Out. Bit is automatically cleared by hardware on a Byte Complete event. 0 nack the last received byte. 1 ack the last received byte" hidden="false" />
      <field name="address" from="3" to="3" access="RW" resetVal="" desc="It must be cleared by firmware with write of '0' to the bit position. 1 the received byte is a slave address. This bit is held zero if I2C_CFG.en_mstr and I2C_CFG.en_slave are both zero" hidden="false" />
      <field name="transmit" from="2" to="2" access="RW" resetVal="" desc="Bit is set by firmware to define the direction of the byte transfer. Any Start detect will clear the bit. 0 receive mode 1 transmit mode. This bit is held zero if I2C_CFG.en_mstr and I2C_CFG.en_slave are both zero." hidden="false" />
      <field name="lrb" from="1" to="1" access="RW" resetVal="" desc="Last Received Bit. The value of the 9th bit in a Transmit sequence, which is the acknowledge bit from the receiver. Any Start detect or a write to the Start or Restart generate bits, when operating in Master mode, will also clear the bit. 0 last transmitted byte was ACK'ed by the receiver. 1 last transmitted byte was NACK'ed by the receiver. This bit is held zero if I2C_CFG.en_mstr and I2C_CFG.en_slave are both zero." hidden="false" />
      <field name="byte_complete" from="0" to="0" access="RW" resetVal="" desc="Transmit/Receive Mode: 0 no completed transmit/receive since last cleared by firmware. Any Start detect or a write to the start or Restart generate bits, when operating in Master mode, will also clear the bit. Transmit mode: 1 eight bits of data have been transmitted and an ACK or NACK has been received. Receive mode: 1 eight bits of data have been received. This bit is held zero if I2C_CFG.en_mstr and I2C_CFG.en_slave are both zero." hidden="false" />
    </register>
    <register name="I2C_1_FF_DATA" address="0x400049D8" bitWidth="8" desc="I2C Data Register" hidden="false">
      <field name="data" from="7" to="0" access="RW" resetVal="" desc="Read received data or write data to transmit. These bits are held zero if I2C_CFG.en_mstr and I2C_CFG.en_slave are both zero." hidden="false" />
    </register>
    <register name="I2C_1_FF_MCSR" address="0x400049D9" bitWidth="8" desc="Master Control and Status Register: I2C_MCSR" hidden="false">
      <field name="stop_gen" from="4" to="4" access="RW" resetVal="" desc="This bit is set only for master transmitter and used at the end of byte transfer. After byte complete status is set, if this bit is set followed by the Transmit bit in I2C.CSR register, Stop condition is generated after byte complete. This bit is automatically reset to 0 after the Stop, start or Restart has been generated. During data phase, if Stop Gen bit is set to 0, clearing the Transmit bit in I2C.CSR register will also generate a Stop condition. This bit is held zero if I2C_CFG.en_mstr and I2C_CFG.en_slave are both zero." hidden="false" />
      <field name="bus_busy" from="3" to="3" access="R" resetVal="" desc="This bit is set to the following. 0 when a Stop condition is detected (from any bus master). 1 when a Start condition is detected (from any bus master). This bit is held zero if I2C_CFG.en_mstr and I2C_CFG.en_slave are both zero." hidden="false" />
      <field name="master_mode" from="2" to="2" access="R" resetVal="" desc="This bit is set/cleared by hardware when the device is operating as a master. 0 stop condition detected, generated by this device. 1 start condition detected, generated by this device. This bit is held zero if I2C_CFG.en_mstr and I2C_CFG.en_slave are both zero." hidden="false" />
      <field name="restart_gen" from="1" to="1" access="RW" resetVal="" desc="This bit is cleared by hardware when the Restart generation is complete. 0 restart generation complete. 1 generate a Restart condition. This bit is held zero if I2C_CFG.en_mstr and I2C_CFG.en_slave are both zero." hidden="false" />
      <field name="start_gen" from="0" to="0" access="RW" resetVal="" desc="This bit is cleared by hardware when the Start generation is complete. 0 start generation complete. 1 generate a Start condition and send a byte (address) to the I2C bus, if bus is not busy. This bit is held zero if I2C_CFG.en_mstr and I2C_CFG.en_slave are both zero." hidden="false" />
    </register>
    <register name="I2C_1_FF_CLK_DIV1" address="0x400049DB" bitWidth="8" desc="I2C Clock Divide Factor Register-1" hidden="false">
      <field name="Div" from="7" to="0" access="RW" resetVal="" desc="The configuration of this register along with that in register CLK_DIV2 defines the factor by which the SYSCLK will be divided in the I2C block. These bits are held zero if I2C_CFG.en_mstr and I2C_CFG.en_slave are both zero." hidden="false" />
    </register>
    <register name="I2C_1_FF_CLK_DIV2" address="0x400049DC" bitWidth="8" desc="I2C Clock Divide Factor Register-2" hidden="false">
      <field name="Div" from="1" to="0" access="RW" resetVal="" desc="The configuration of this register along with that in register CLK_DIV1 defines the factor by whichthe SYSCLK will be divided in the I2C block. These bits are held zero if I2C_CFG.en_mstr and I2C_CFG.en_slave are both zero." hidden="false" />
    </register>
    <register name="I2C_1_FF__TMOUT_CSR" address="0x400049DD" bitWidth="8" desc="I2C Timerout Control and Status Register" hidden="false">
      <field name="sda_pin_status" from="4" to="4" access="RW" resetVal="" desc="SDA Line status." hidden="false" />
      <field name="scl_pin_status" from="3" to="3" access="RW" resetVal="" desc="SCL Line status." hidden="false" />
      <field name="i2c_timeout_int_enable" from="2" to="2" access="R" resetVal="" desc="I2C Timeout interrupt enable." hidden="false" />
      <field name="i2c_sda_timeout_enable" from="1" to="1" access="RW" resetVal="" desc="I2C SDA Timeout enable." hidden="false" />
      <field name="i2c_scl_timeout_enable" from="0" to="0" access="RW" resetVal="" desc="I2C SCL Timeout enable." hidden="false" />
    </register>
    <register name="I2C_1_FF__TMOUT_SR" address="0x400049DE" bitWidth="8" desc="I2C Timerout Status Register" hidden="false">
      <field name="sda_tmout_status" from="1" to="1" access="RW" resetVal="" desc="SDA Timeout status." hidden="false" />
      <field name="scl_tmout_status" from="0" to="0" access="RW" resetVal="" desc="SCL Timeout status." hidden="false" />
    </register>
    <register name="I2C_1_FF__TMOUT_CFG0" address="0x400049DF" bitWidth="8" desc="I2C Timerout Period Configuration Register-0" hidden="false">
      <field name="timeout_period_lowbyte" from="7" to="0" access="RW" resetVal="" desc="The configuration of this register along with that in register TMOUT_CFG1 to define the number units before SCL or SDA stuck low timeout triggers the I2C interrupt. The one unit is equal to SYSCLK/1024. The TMOUT_CFG0 defines lower byte of the period." hidden="false" />
    </register>
    <register name="I2C_1_FF__TMOUT_CFG1" address="0x400049E0" bitWidth="8" desc="Extended Configuration Register: TMOUT_CFG1" hidden="false">
      <field name="timeout_period_highnibble" from="3" to="0" access="RW" resetVal="" desc="The configuration of this register along with that in register TMOUT_CFG1 to define the number units before SCL or SDA stuck low timeout triggers the I2C interrupt. The one unit is equal to SYSCLK/1024. The TMOUT_CFG1 defines higher octet of the period." hidden="false" />
    </register>
  </block>
  <block name="SCL_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
  <block name="SDA_1" BASE="0x0" SIZE="0x0" desc="" visible="true" hidden="false" />
</blockRegMap>