********************************
* Copyright:                   *
* Vishay Intertechnology, Inc. *
********************************
*Jan 08, 2018
*ECN S18-0005, Rev. A
*File Name: SiR106DP_PS.txt and SiR106DP_PS.lib
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT SiR106DP  D G S 
M1 3 GX S S NMOS W= 7970000u L= 0.30u 
M2 S GX S D PMOS W= 7970000u L= 0.13u 
R1 D 3 5.847e-03 TC=9.029e-03,3.233e-05
CGS GX S 2.543e-09 
CGD GX D 1.000e-13 
RG G GY 0.8 
RTCV 100 S 1e6 TC=1.004e-04,1.829e-06
ETCV GX GY 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD S D DBD 7970000u 
************************************************** 
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 7e-8 
+ RS = 0 KP = 7.906e-06 NSUB = 1.238e+17 
+ KAPPA = 4.018e-02 NFS = 2.704e+11 
+ LD = 0 IS = 0 TPG = 1    )
************************************************** 
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 7e-8 
+NSUB = 1.408e+15 IS = 0 TPG = -1    )
************************************************** 
.MODEL DBD D ( 
+FC = 0.1 TT = 1.601e-07 T_measured = 25 BV = 101
+RS = 5.979e-03 N = 1.114e+00 IS = 4.134e-12 
+EG = 1.213e+00 XTI = 1.678e-01 TRS1 = 2.749e-03
+CJO = 5.694e-10 VJ = 1.149e+00 M = 7.529e-01 ) 
.ENDS 
