********************************
* Copyright:                   *
* Vishay Intertechnology, Inc. *
********************************
*Mar 14, 2016
*ECN S16-0450, Rev. A
*File Name: SiR696DP_PS.txt and SiR696DP_PS.lib
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT SiR696DP D G S 
M1 3 GX S S NMOS W= 4597268u L= 0.30u 
M2 S GX S D PMOS W= 4597268u L= 0.30u 
R1 D 3 7.486e-03 TC=6.946e-03,2.192e-05
CGS GX S 1.0460e-09 
CGD GX D 1.000e-13 
RG G GY 1m 
RTCV 100 S 1e6 TC=1.0545e-04,9.428e-06
ETCV GX GY 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD S D DBD 4597268u 
************************************************ 
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 10e-8 
+ RS = 0 KP = 5.585e-06 NSUB = 8.833e+16 
+ KAPPA = 9.003e-02 NFS = 4.120e+11 
+ LD = 0 IS = 0 TPG = 1    )
************************************************  
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 10e-8 
+NSUB = 1.529e+15 IS = 0 TPG = -1    )
************************************************  
.MODEL DBD D ( 
+FC = 0.1 TT = 2.000e-08 T_measured = 25 BV = 126
+RS = 7.200e-03 N = 1.115e+00 IS = 4.558e-12 
+EG = 1.225e+00 XTI = 1.448e-01 TRS1 = 2.571e-03
+CJO = 7.470e-10 VJ = 8.718e+00 M = 9.990e-01 ) 
.ENDS 
