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* Copyright:                   *
* Vishay Intertechnology, Inc. *
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*Oct 23, 2017
*ECN S17-1634, Rev. A
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT Si7190ADP D G S 
M1 3 GX S S NMOS W= 2649735u L= 0.30u 
M2 S GX S D PMOS W= 2649735u L= 0.43u 
R1 D 3 8.016e-02 1.005e-02 3.156e-05 
CGS GX S 6.044e-10 
CGD GX D 1.000e-13 
RG G GY 2.4 
RTCV 100 S 1e6 1.081e-03 -6.424e-05 
ETCV GX GY 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD S D DBD 2649735u 
************************************************ 
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 10e-8 
+ RS = 0 KP = 3.157e-06 NSUB = 4.525e+16 
+ KAPPA = 1.060e-04 NFS = 1.002+11 
+ LD = 0 IS = 0 TPG = 1 CAPOP = 12 ) 
************************************************ 
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 10e-8 
+NSUB = 9.204e+14 IS = 0 TPG = -1 CAPOP = 12 ) 
************************************************ 
.MODEL DBD D ( 
+FC = 0.1 TT = 2.000e-07 TREF = 25 BV = 251 
+RS = 3.985e-03 N = 1.400e+00 IS = 8.404e-10 
+EG = 1.109e+00 XTI = 2.461e+00 TRS = 1.159e-03 
+CJO = 6.345e-10 VJ = 3.925e+00 M = 1.000e+00 ) 
.ENDS 
