*Dec 10, 2012
*ECN S12-3004, Rev. C
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT Si7460DP 4 1 2
M1  3 1 2 2 NMOS W=5393522u L=0.25u 
M2  2 1 2 4 PMOS W=5393522u L=0.40u 
R1  4 3     RTEMP 3.3E-3
CGS 1 2     3000E-12
DBD 2 4     DBD
******************************************************************* 
.MODEL  NMOS       NMOS ( LEVEL  = 3               TOX    = 7E-8
+ RS     = 4.5E-3         RD     = 0               NSUB   = 1.85E17  
+ KP     = 1.29E-5        UO     = 650             
+ VMAX   = 0              XJ     = 5E-7            KAPPA  = 1E-2
+ ETA    = 1E-4           TPG    = 1  
+ IS     = 0              LD     = 0               
+ CGSO   = 0              CGDO   = 0               CGBO   = 0 
+ TLEV   = 1              BEX    = -1.9            TCV    = 5.6E-3
+ NFS    = 0.8E12         DELTA  = 0.1)
******************************************************************* 
.MODEL  PMOS       PMOS ( LEVEL  = 3               TOX    = 7E-8
+NSUB    = 3E16           TPG    = -1)   
******************************************************************* 
.MODEL DBD D (CJO=1400E-12 VJ=0.38 M=0.36
+RS=0.1 FC=0.5 IS=1E-12 TT=5E-8 N=1 BV=60.2)
******************************************************************* 
.MODEL RTEMP R (TC1=9E-3 TC2=5.5E-6)
******************************************************************* 
.ENDS

