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* Copyright:                   *
* Vishay Intertechnology, Inc. *
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*24-Sep-2018
*ECN S18-0979, Rev. A
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT SiSS46DN D G S 
M1 3 GX S S NMOS W= 5028750u L= 0.30u 
M2 S GX S D PMOS W= 5028750u L= 0.15u 
R1 D 3 8.800e-03 8.104e-03 2.774e-05 
CGS GX S 1.552e-09 
CGD GX D 1.391e-12 
RG G GY 0.85 
RTCV 100 S 1e6 1.627e-03 -0.730e-05 
ETCV GX GY 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD S D DBD 5028750u 
************************************************** 
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 7e-8 
+ RS = 0 KP = 7.706e-06 NSUB = 1.274e+17 
+ KAPPA = 9.088e-02 NFS = 4.056e+11 
+ LD = 0 IS = 0 TPG = 1 CAPOP = 12 ) 
************************************************** 
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 7e-8 
+NSUB = 2.303e+15 IS = 0 TPG = -1 CAPOP = 12 ) 
************************************************** 
.MODEL DBD D ( 
+FC = 0.1 TT = 4.778e-08 TREF = 25 BV = 101 
+RS = 8.889e-03 N = 9.714e-01 IS = 1.000e-13 
+EG = 1.188e+00 XTI = -3.480e-01 TRS = 3.533e-04 
+CJO = 5.392e-10 VJ = 1.439e+00 M = 7.943e-01 ) 
.ENDS 
