********************************
* Copyright:                   *
* Vishay Intertechnology, Inc. *
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*Mar 19, 2018
*ECN S18-0331, Rev. A
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT SiAA00DJ D G S 
M1 3 GX S S NMOS W= 2612500u L= 0.30u 
M2 S GX S D PMOS W= 2612500u L= 0.12u 
R1 D 3 2.352e-03 2.091e-03 1.187e-05 
CGS GX S 5.398e-10 
CGD GX D 1.008e-13 
RG G GY 1.25 
RTCV 100 S 1e6 2.417e-04 -5.608e-07 
ETCV GX GY 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD S D DBD 2612500u 
**************************************************  
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 4e-8 
+ RS = 0 KP = 6.313e-06 NSUB = 1.084e+17 
+ KAPPA = 4.025e-01 NFS = 7.001e+10 
+ LD = 0 IS = 0 TPG = 1 CAPOP = 12 ) 
************************************************** 
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 4e-8 
+NSUB = 4.970e+16 IS = 0 TPG = -1 CAPOP = 12 ) 
************************************************** 
.MODEL DBD D ( 
+FC = 0.1 TT = 6.582e-08 TREF = 25 BV = 26 
+RS = 3.354e-03 N = 1.133e+00 IS = 6.877e-12 
+EG = 1.163e+00 XTI = 9.396e-01 TRS = 2.712e-03 
+CJO = 4.308e-10 VJ = 7.914e+00 M = 9.990e-01 ) 
.ENDS 
