********************************
* Copyright:                   *
* Vishay Intertechnology, Inc. *
********************************
*13-Aug-2018
*ECN S18-0819, Rev. A
*File Name: Si4850BDY_PS.txt and Si4850BDY_PS.lib
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT Si4850BDY D G S 
M1 3 GX S S NMOS W= 1407287u L= 0.30u 
M2 S GX S D PMOS W= 1407287u L= 0.11u 
R1 D 3 1.480e-02 TC=5.230e-03,1.001e-05
CGS GX S 6.282e-10 
CGD GX D 8.292e-13 
RG G GY 0.60 
RTCV 100 S 1e6 TC=1.109e-04,-0.301e-05
ETCV GX GY 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD S D DBD 1407287u 
************************************************** 
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 5e-8 
+ RS = 0 KP = 1.895e-05 NSUB = 1.298e+17 
+ KAPPA = 6.705e-02 NFS = 7.210e+11 
+ LD = 0 IS = 0 TPG = 1    )
************************************************** 
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 5e-8 
+NSUB = 3.834e+16 IS = 0 TPG = -1    )
************************************************** 
.MODEL DBD D ( 
+FC = 0.1 TT = 9.360e-08 T_measured = 25 BV = 61
+RS = 6.364e-03 N = 1.154e+00 IS = 1.489e-11 
+EG = 1.215e+00 XTI = 3.084e-01 TRS1 = 2.955e-03
+CJO = 6.489e-10 VJ = 9.468e+00 M = 6.514e-01 ) 
.ENDS 
