********************************
* Copyright:                   *
* Vishay Intertechnology, Inc. *
********************************
*Dec 25, 2017
*ECN S17-1899, Rev. A
*File Name: Si4103DY_PS.txt and Si4103DY_PS.lib
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT Si4103DY  D G S 
M1 3 GX S S PMOS W= 10370000u L= 0.30u 
M2 S GX S D NMOS W= 10370000u L= 0.20u 
R1 D 3 5.501e-03 TC=3.379e-03,6.173e-06
CGS GX S 3.391e-09 
CGD GX D 2.712e-10 
RG G GY 3.8 
RTCV 100 S 1e6 TC=1.005e-04,1.685e-06
ETCV GY GX 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD D S DBD 10370000u 
**************************************************  
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 5e-8 
+ RS = 0 KP = 3.615e-06 NSUB = 2.729e+16 
+ KAPPA = 1.010e-02 NFS = 7.816e+11 
+ LD = 0 IS = 0 TPG = -1    )
**************************************************  
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 5e-8 
+NSUB = 1.730e+16 IS = 0 TPG = -1    )
************************************************** 
.MODEL DBD D ( 
+FC = 0.1 TT = 5.591e-08 T_measured = 25 BV = 31
+RS = 3.708e-02 N = 1.042e+00 IS = 1.295e-12 
+EG = 1.432e+00 XTI = -9.850e+00 TRS1 = 2.197e-03
+CJO = 2.075e-11 VJ = 5.430e+00 M = 8.886e-01 ) 
.ENDS 
