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* Copyright:                   *
* Vishay Intertechnology, Inc. *
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*Dec 25, 2017
*ECN S17-1907, Rev. A
*This document is intended as a SPICE modeling guideline and does not
*constitute a commercial product datasheet. Designers should refer to the
*appropriate datasheet of the same number for guaranteed specification
*limits.
.SUBCKT SiR108DP D G S 
M1 3 GX S S NMOS W= 5076250u L= 0.30u 
M2 S GX S D PMOS W= 5076250u L= 0.14u 
R1 D 3 9.072e-03 8.750e-03 3.089e-05 
CGS GX S 1.405e-09 
CGD GX D 4.973e-13 
RG G GY 0.9 
RTCV 100 S 1e6 2.614e-03 -.0570e-04 
ETCV GX GY 100 200 1 
ITCV S 100 1u 
VTCV 200 S 1 
DBD S D DBD 5076250u 
************************************************* 
.MODEL NMOS NMOS ( LEVEL = 3 TOX = 7e-8 
+ RS = 0 KP = 4.250e-06 NSUB = 1.299e+17 
+ KAPPA = 2.054e-02 NFS = 3.866e+11 
+ LD = 0 IS = 0 TPG = 1 CAPOP = 12 ) 
************************************************* 
.MODEL PMOS PMOS ( LEVEL = 3 TOX = 7e-8 
+NSUB = 9.164e+15 IS = 0 TPG = -1 CAPOP = 12 ) 
************************************************* 
.MODEL DBD D ( 
+FC = 0.1 TT = 6.462e-08 TREF = 25 BV = 101 
+RS = 5.844e-03 N = 1.079e+00 IS = 1.324e-12 
+EG = 1.249e+00 XTI = -1.162e+00 TRS = 4.089e-03 
+CJO = 4.782e-10 VJ = 8.382e-01 M = 6.809e-01 ) 
.ENDS 
